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http://dx.doi.org/10.3745/KIPSTD.2010.17D.4.283

Test Case Generation Strategy for Timing Diagram  

Lee, Hong-Seok (아주대학교 전자공학과)
Chung, Ki-Hyun (아주대학교 전자공학부)
Choi, Kyung-Hee (아주대학교 정보통신전문대학원)
Publication Information
The KIPS Transactions:PartD / v.17D, no.4, 2010 , pp. 283-296 More about this Journal
Abstract
Timing diagram is a useful tool for describing the specification of system, but there is no study for test case strategy of a timing diagram. To solve this problem, we followed the steps to generate test cases from timing diagram in this paper. 1) We defined a timing diagram formally. 2) We describe the method of transforming from a timing diagram model into a Stateflow model which has an equivalent relationship between a timing diagram model and a transformed Stateflow model. 3) We generated test cases from a transformed Stateflow model using SDV which is plugged in Simulink. To show that our approach is useful, we made an experiment with a surveillance model and arbitrary timing diagram models. In the experiment we transformed timing diagram models into Stateflow models, generated test cases from transformed Stateflow models using SDV, and analyzed the generation results. The conclusion that can be obtained from this study is that timing diagram is not only a specification tool but also a useful tool when users are trying to generate test cases based on model.
Keywords
Automatic Test Case Generation; Stateflow; Timing Diagram; Specification; Embedded System;
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