• JSTS:Journal of Semiconductor Technology and Science
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• v.6 no.1
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• pp.22-29
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• 2006

We demonstrate highly manufacturable Multi-channel Field Effect Transistor (McFET) on bulk Si wafer. McFET shows excellent transistor characteristics, such as $5{\sim}6 times higher drive current than planar MOSFET, ideal subthreshold swing, low drain induced barrier lowering (DIBL) without pocket implantation and negligible body bias dependency, maintaining the same source/drain resistance as that of a planar transistor due to the unique feature of McFET. And suitable threshold voltage ($V_T$) for SRAM operation and high static noise margin (SNM) are achieved by using TiN metal gate electrode.

• Journal of the Institute of Convergence Signal Processing
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• v.6 no.4
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• pp.206-211
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• 2005

We describe the design for a correlator and an access code generator in bluetooth system. These are used for a connection setting, a packet decision and a clock synchronization between Bluetooth units. The correlator consists of two blocks; carry save adder based on Wallace tree and threshold-value decision block. It determines on an useful packet and clock-synchronization for input signal of 1.0Mbps through the sliding-window correlating. The access-code generator also consists of two blocks; BCH(Bose-Chadhuri-Hocquenghem) cyclic encoder and control block. It generates the access-codes according to four steps' generation process based on Bluetooth standard. In order to solve synchronization problem, we make use of any memory as a pseudo random sequence. The proposed correlator and access-code generator were coded with VHDL. An FPGA Implementation of these modules and the simulation results are proved by Xilinx chip. The critical delay and correlative margin based on synthesis show the 4.689ns and the allowable correlation-error up to 7-bit.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.55 no.6
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• pp.297-301
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• 2006

In the present work, we investigate the characteristics of new composition material, chalcogenide $Ge_1Se_1Te_2$ material in order to overcome the problems of conventional PRAM devices. The Tc of $Ge_1Se_1Te_2$ bulk was measured $231.503^{\circ}C$ with DSC analysis. For static DC test mode, at low voltage, two different resistances are observed. depending on the crystalline state of the phase-change resistor. In the first sweep, the as-deposited amorphous $Ge_1Se_1Te_2$ showed very high resistance. However when it reached the threshold voltage(about 11.8 V), the electrical resistance of device was drastically reduced through the formation of an electrically conducting path. The phase transition between the low conductive amorphous state and the high conductive crystal]me state was caused by the set and reset pulses respectively which fed through electrical signal. Set pulse has 4.3 V. 200 ns. then sample resistance is $80\sim100{\Omega}$. Reset pulse has 8.6 V 80 ns, then the sample resistance is $50{\sim}100K{\Omega}$. For such high resistance ratio of $R_{reset}/R_{set}$, we can expect high sensing margin reading the recorded data. We have confirmed that phase change properties of $Ge_1Se_1Te_2$ materials are closely related with the structure through the experiment of self-heating layers.

• 한국정보통신설비학회:학술대회논문집
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• 2008.08a
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• pp.469-472
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• 2008

In this paper, we discuss the recent trends on the passive UHF RFID tag chip design techniques and several important system parameters. We also summarize link budget studies on both conventional and modem UHF RFID communications. The paper highlights the reverse link limited case, which has known to be the minor concern if reader continuous wave (CW) can reach the tag in sufficient level. This makes sense when the tag sensitivity is rather high (over 10-12${\mu}W$); however, since the tag chip fabrication technologies have been developed by time, the tag chip threshold levels are now less-dominant in determining link margin. If the tag limitation can be alleviated, the forward link limited case can be resolved; thus, we rather focus on the path-loss problem. Since the path-losses are still exist in both forward and reverse links, and it can be doubled while CW travels the reader-tag-reader path because forward link and reverse link are on the same distance. Consider if reader receiver sensitivity is very high in the worst case. In this case, weaken tag response (i.e., backscatters) cannot reach the level that reader receiver can process tag data; bit-error rate can be higher. Overall, backscatter levels should be high enough so that reader receiver can correctly function. After discussing link budget, we carried out practical measurements on fading effects between two circularly polarized UHF RFID antennas in a small scale area.

• Journal of the Korean Society of Fisheries and Ocean Technology
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• v.46 no.2
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• pp.165-172
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• 2010

This study was performed to estimate the swimming velocity of Pacific saury (Cololabis saira) migrated offshore Funka Bay of Hokkaido using an acoustic Doppler current profiler (OceanSurveyor, RDI, 153.6kHz) established in T/S Ushio-maru of Hokkaido University, in September 27, 2003. The ADCP's doppler shift revealed as the raw data that the maximum swimming velocity was measured 163.0cm/s, and its horizontal swimming speed and direction were $72.4{\pm}24.1\;cm/s$, $160.1^{\circ}{\pm}22.3^{\circ}$ while the surrounding current speed and direction were $19.6{\pm}8.4\;cm/s$, $328.1^{\circ}{\pm}45.3^{\circ}$. To calculate the actual swimming speed of Pacific saury in each bins, comparisons for each stratified bins must be made between the mean surrounding current velocity vectors, measured for each stratified bin, and its mean swimming velocity vectors, assumed by reference (threshold > -70dB) and 5dB margin among four beams of ADCP. As a result, the actual averaged swimming velocity was 88.6cm/s and the averaged 3-D swimming velocity was 91.3cm/s using the 3-D velocity vector, respectively.

• Journal of Korean Society of Transportation
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• v.35 no.6
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• pp.499-510
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• 2017

Traffic accident fatalities in Korea in 2016 was 4,292 and 1,732 cases were deaths of elderly people. In spite of this, the researches on behaviors of the elderly when crossing roads, are rather limited. The purpose of this study is to investigate and analyze road crossing behavior characteristics of the elderly, when crossing roads, especially focusing on the characteristics of pedestrians and vehicles. Cross-sectional data was collected from six different sites in two regions and the following results was identified. First, at road crossings, 528 cases(84.3%) out of 626 conflict situations of the elderly and 303 cases(63.3%) out of 478 conflict situations of the non-elderly pedestrians were found to be dangerous, respectively. The elderly tend to face a statistically significant risk of 3.11 times higher than that of non-elderly people. Second, 519 cases(82.9%) of jaywalking occurred in 626 conflict cases of the elderly and 375 cases(78.5%) of jaywalking in 478 conflict events of non-elderly persons, which indicates the elderly's 1.34 times higher trend compared with the non-elderly's. Third, the pedestrian safety margin (PSM) analysis showed that the PSM of the elderly and the non-elderly were 3.33 seconds and 4.04 seconds respectively, which is 17.5% high. Fourth, the difference in pedestrian safety interval was examined by dividing the speed of approaching vehicle into less than 30km/h, above 30km/h and less than 50km/h, and over 50km/h. There was no significant difference between the PSM of coming vehicles with the speed less than 30km/h and the PSM of approaching with the speed 30km/h~50km/h, but the conflicts with vehicle of the speed above 50km/h show significantly lower PSM than with vehicle speed of 30km/h~50km/h. Finally, when the risk threshold is set to less than 2.5 seconds, the analysis shows that older pedestrians tend to cross roads dangerously 1.59~2.53 times than younger pedestrians. The results set forth here can be used as a basis for constructing the elderly safety measures at present and a potential basis for autonomous vehicle safety application in the future for solving the issue of the difference in crossing behavior between elderly and non-elderly pedestrians.

• Korean Journal of Agricultural Science
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• v.36 no.2
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• pp.135-145
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• 2009

This research was conducted to investigate the effect of various phosphorus concentrations in fertilizer solution on growth of and nutrient uptake by 'Chugyang' egg plant (Solanum melongena L.). Tissue and soil analyses were also conducted to set the threshold levels of phosphorus in plants when disorders develop for phosphorus deficiency or excess. Brown and purple areas developed on the margin of mature leaves and it enlarged rapidly in P deficient plants. The fruits in P deficient plants were small and dull purple in color. When P were excess in fertigation solution, the margins of lower leaves became scorched and it enlarged to inner part of the leaves. The fruits of P excess plants became small and had the curl shape. The tissue $PO_4$-P contents in the most recently fully expanded leaves and dry weight of full above ground plant tissue at 35 days after transplanting showed quadratic response ($y=0.7887+0.2394x-0.0197x^2$) and cubic response ($y=10.43+14.47x-4.7642x^2+0.3977x^3$) to elevated $PO_4$-P concentrations, respectively. When 10% reduction in dry weight set to threshold levels, optimum tissue $PO_4$-P contents are between 0.98 to 1.35%. The yield determined at 150 days after transplanting also showed cubic response to elevated phosphorus concentrations in fertigation solution ($y=1194.6+1502.2x-454.5x^2+35.64x^3$). When the 10% reduction in yield is set to threshold levels, the tissue $PO_4$-P contents for maximum yield should be around 1.53% to 2.25% in most recently fully expanded leaves at 150 days after transplanting.

• The Korean Journal of Financial Management
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• v.20 no.1
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• pp.191-212
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• 2003

Recently, there is a growing body of literature that suggests that information inefficiency is one of the causes of the asymmetric volatility. If this explanation for the asymmetric volatility is appropriate, then innovations, such as the introduction of futures, may be expected to impact the asymmetric volatility of stock market. As transaction costs and margin requirements in the futures market are lower than those in the spot market, new information is transmitted to futures prices more quickly and affects spot prices through arbitrage trading with spots. Also, the merit of the futures market may attract noise traders away from the spot market to the futures market. This study examines the impact of futures on the asymmetry of stock market volatility. If the asymmetric volatility is significant lower post-futures and exist in the futures market, it has validity that the asymmetric volatility is caused by information inefficiency in the spot market. The data examined are daily logarithmic returns on KOSPI 200 stock price index from January 4, 1993 to December 26, 2000. To examine the existence of the asymmetric volatility in the futures market, logarithmic returns on KOSPI 200 futures are used from May 4, 1996 to December 26, 2000. We used a conditional mode of TGARCH(threshold GARCH) of Glosten, Jagannathan and Runkel(1993). Pre-futures the spot market exhibits significant asymmetric responses of volatility to news and post-futures asymmetries are significantly lower, irrespective of bear market and bull market. The results suggest that the introduction of stock index futures has an effect on the asymmetric volatility of the spot market and are inconsistent with leverage being the sole explanation of asymmetry. However, it is found that the volatility of futures is not so asymmetric as expected.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.35D no.10
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• pp.39-50
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• 1998

Wide-band sharp-transition filters are widely used in applications such as wireless CODEC design or medical systems. Since these filters suffer from large sensitivity and roundoff noise, large word-length is required for the VLSI implementation, which increases the hardware size and the power consumption of the chip. In this paper, a low-power implementation technique for digital filters with wide-band sharp-transition characteristics is proposed using CPL (Complementary Pass-Transistor Logic), LWDF (Lattice Wave Digital Filter) and a modified DIFIR (Decomposed & Interpolated FIR) algorithm. To reduce the short-circuit current component in CPL circuits due to threshold voltage reduction through the pass transistor, three different approaches can be used: cross-coupled PMOS latch, PMOS body biasing and weak PMOS latch. Of the three, the cross-coupled PMOS latch approach is the most realistic solution when the noise margin as well as the energy-delay product is considered. To optimize CPL transistor size with insight, the empirical formulas for the delay and energy consumption in the basic structure of CPL circuits were derived from the simulation results. In addition, the filter coefficients are encoded using CSD (Canonic Signed Digit) format and optimized by a coefficient quantization program. The hardware cost is minimized further by a modified DIFIR algorithm. Simulation result shows that the proposed method can achieve about 38% reductions in power consumption compared with the conventional method.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.3
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• pp.60-68
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• 2008

This work describes a re-configurable 10MS/s to 100MS/s, low-power 10b two-step pipeline ADC operating at a power supply from 0.5V to 1.2V. MOS transistors with a low-threshold voltage are employed partially in the input sampling switches and differential pair of the SHA and MDAC for a proper signal swing margin at a 0.5V supply. The integrated adjustable current reference optimizes the static and dynamic performance of amplifiers at 10b accuracy with a wide range of supply voltages. A signal-isolated layout improves the capacitor mismatch of the MDAC while a switched-bias power-reduction technique reduces the power dissipation of comparators in the flash ADCs. The prototype ADC in a 0.13um CMOS process demonstrates the measured DNL and INL within 0.35LSB and 0.49LSB. The ADC with an active die area of $0.98mm^2$ shows a maximum SNDR and SFDR of 56.0dB and 69.6dB, respectively, and a power consumption of 19.2mW at a nominal condition of 0.8V and 60MS/s.