• Current Photovoltaic Research
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• v.2 no.3
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• pp.95-102
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• 2014

Light trapping techniques can change the propagation direction of incident light and keep the light longer in the absorption layers of solar cells to enhance the power conversion efficiency. In thin film silicon (Si) solar cells, the thickness of absorption layer is generally not enough to absorb entire available photons because of short carrier life time, and light induced degradation effect, which can be compensated by the light trapping techniques. These techniques have been adopted as textured transparent conduction oxide (TCO) layers randomly or periodically textured, intermediate reflection layers of tandem and triple junction, and glass substrates etched by various patterning methods. We reviewed the light trapping techniques for thin film Si solar cells and mainly focused on the commercially available techniques applicable to textured TCO on patterned glass substrates. We described the characterization methods representing the light trapping effects, texturing of TCO and showed the results of multi-scale textured TCO on etched glass substrates. These methods can be used tandem and triple thin film Si solar cells to enhance photo-current and power conversion efficiency of long term stability.

• The Korean Journal of Ceramics
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• v.3 no.1
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• pp.18-20
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• 1997

The fabrication process of silicon-diamond(SOD) structure wafer were studied. Microwave plasma chemical vapor deposition (MWPCVD) and annealing technology were used to synthesize diamond film with high resistivity and thermal conductivity. Bonding and etchback silicon-on-diamond (BESOD) were utilized to form supporting substrate and single silicon thin layer of SOD wafer. At last, a SOD structure wafer with 0.3~1$\mu\textrm{m}$ silicon film and 2$\mu\textrm{m}$ diamond film was prepared. The characteristics of radiation for a CMOS integrated circuit (IC) fabricated by SOD wafer were studied.

• 한국정보디스플레이학회:학술대회논문집
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• 2004.08a
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• pp.305-308
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• 2004

We present a novel process for the ultra low temperature (<150$^{\circ}C$) polycrystalline silicon (ULTPS) TFT for the flexible display applications on the plastic substrate. The sequential lateral solidification (SLS) was used for the crystallization of the amorphous silicon film deposited by rf magnetron sputtering, resulting in high mobility polycrystalline silicon (poly-Si) film. The gate dielectric was composed of thin $SiO_2$ formed by plasma oxidation and $Al_2O_3$ deposited by plasma enhanced atomic layer deposition. The breakdown field of gate dielectric on poly-Si film showed above 6.3 MV/cm. Laser activation reduced the source/drain resistance below 200 ${\Omega}$/ㅁ for n layer and 400 ${\Omega}$/ㅁ for p layer. The fabricated ULTPS TFT shows excellent performance with mobilities of 114 $cm^2$/Vs (nMOS) and 42 $cm^2$/Vs (pMOS), on/off current ratios of 4.20${\times}10^6$ (nMOS) and 5.7${\times}10^5$ (PMOS).

• Journal of Integrative Natural Science
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• v.3 no.4
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• pp.219-225
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• 2010

On the surface of mesoporous silica thin films (MSTF) which were fabricated by sol-gel approach there are existences of water and three different silanol types including chained, germinal and isolated silanol. Their amounts changes as a function of aging time of used sol solution, as confirmed by FT-IR. The adsorbed water generates ionic carriers such as H+ and OH- and passivates the Si dangling bonds at the interface of silicon wafer-MSTF. The ionic carriers can not only transport across the thickness of thin film to enhance the leakage current but also diffuse toward the silicon wafer-MSTF interface to depassivate Si dangling bonds. On the other hand, chained silanols or germinal silanols promote the moisture adsorption of MSTF and tend to form strongly hydrogen bonded systems with adsorbed water molecules resulting in very high dielectric constant. Isolated silanol, on the contrary, affects less on electrical properties of thin film.

• 한국신재생에너지학회:학술대회논문집
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• 2007.06a
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• pp.280-283
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• 2007

The first grid-connected, building-integrated transparent amorphous silicon photovoltaic installation has been operated since October 2004 in Yongin, Korea. The 2.2kWp transparent PV system was applied to the facade of entrance hall in newly constructed KOLON E&C R&D building. The PV module is a nominal 0.98m ${\times}$ 0.95m, 10% transparent, laminated, amorphous(a-Si) thin-film device rated at 44 Wp per module. To demonstrate the architectural features of thin film PV technologies for daylighting application, transparent PV modules are attached to the building envelope with the form of single glazed window and special point glazing(SPG) frames. Besides power generation, the 10% transmittance of a-Si PV module provides very smooth natural daylight to the entrance hall without any special shading devices for whole year. The installation is fully instrumented and is continuously monitored in order to allow the performance assessment of amorphous silicon PV operating at the prevailing conditions. This paper presents measured power performance data from the first 12 months of operation. For the first year, annual average system specific yield was just 486.4kWh/kWp/year which is almost half of typical amorphous silicon PV output under the best angle and orientation. It should be caused by building orientation and self-shading of adjacent mass. Besides annual power output, various statistical analysis was performed to identify the characteristics of transparent thin film PV system.

• KIEE International Transactions on Electrophysics and Applications
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• v.5C no.2
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• pp.76-80
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• 2005

In this paper, a miniaturized ring hybrid circuit is characterized based on a thin film microstrip (TFMS) on low-resistivity silicon. In order to obtain low-loss characteristics, a polyimide layer with 50 $\mu$m thickness is spin-coated onto the silicon to be used for the substrate. First, propagation characteristics of TFMS lines consisting of the ring hybrid circuit are presented. Then, a ring hybrid circuit based on TFMS is featured by employing the triple concentric circle approach for miniaturization. Triple concentric circle lines with $\lambda$$_{g}$/4 or 3$\lambda$$_{g}$/4 line lengths are implemented on the surface of the polyimide by circularly meandering to reduce the circuit size of the designed ring hybrid. Good agreement between measured and simulated results is obtained.

• ETRI Journal
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• v.28 no.1
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• pp.45-50
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• 2006

An RC oscillator using amorphous silicon thin film transistors was developed. The oscillation frequency and its dependence on resistance and bias voltage were studied. The frequency was controlled by adjusting the feedback resistance of the oscillator. The highest measured frequency of the oscillator was around 140 kHz, which is acceptable for low-end radio frequency identification (RFID). Since a low-end RFID circuit needs low cost and a simple process, an amorphous silicon oscillator is suitable.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2001.11b
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• pp.201-204
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• 2001

In this paper, for modeling of electrical characteristics in Poly Silicon Thin Film Transistors with process parameters set up optimum values, So, the I-V characteristics of poly silicon TFT parameters are examined and simulated in terms of the variations in process parameter. And these results compared and analyzed simulation values with examination value. The simulation program for characteristic analysis used SUPREM IV for processing, Matlab for modeling by mathematics, and SPICE for electric characteristic of devices. Input parameter for simulation characteristics is like condition of device process sequence, these electric characteristic of $I_D-V_D$ $I_D-V_G$, variations of grain size. The Gate oxide thickness of poly silicon are showed similar results between real device characteristics and simulation characteristics.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2001.11a
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• pp.201-204
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• 2001

In this paper, for modeling of electrical characteristics in Poly Silicon Thin Film Transistors with process parameters set up optimum values. So, the I-V characteristics of poly silicon TFT parameters are examined and simulated in terms of the variations in process parameter. And these results compared and analyzed simulation values with examination value. The simulation program for characteristic analysis used SUPREM IV for processing, Matlab for modeling by mathematics, and SPICE for electric characteristic of devices. Input parameter for simulation characteristics is like condition of device process sequence, these electric characteristic of I$_{D}$-V$_{D}$, I$_{D}$-V$_{G}$, variations of grain size. The Gate oxide thickness of poly silicon are showed similar results between real device characteristics and simulation characteristics.ristics.

• ETRI Journal
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• v.30 no.2
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• pp.308-314
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• 2008

In this paper, we describe the fabrication of 3.5-inch QCIF active matrix organic light emitting display (AMOLED) panels driven by thin film transistors, which are produced by an ultra-low-temperature polycrystalline silicon process on plastic substrates. The over all processing scheme and technical details are discussed from the viewpoint of mechanical stability and display performance. New ideas, such as a new triple-layered metal gate structure to lower leakage current and organic layers for electrical passivation and stress reduction are highlighted. The operation of a 3.5-inch QCIF AMOLED is also demonstrated.