• 제목/요약/키워드: Thin layer

검색결과 5,287건 처리시간 0.028초

AlOx와 SiO2 형판위 CdSe와 CdS 박막의 우선방위(Preferred Orientation) 특성 (The Preferred Orientation of CdSe and CdS Thin Films on the AlOx and SiO2 Templates)

  • 이영건;장기석
    • 한국군사과학기술학회지
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    • 제15권4호
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    • pp.502-506
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    • 2012
  • In order to find the structural characteristics of the thin films of group II-VI semiconductor compounds compared with those of powder materials, films were made of 4 powders of ZnS, CdS, CdSe, and CdTe(Aldrich), each with 99.99 % purity. For the ZnS/CdS multi-layers, the ZnS layer was coated over the CdS layer on an $AlO_x$ membrane, which served as a protective layer within a vacuum at the average speed of 1 ${\AA}$/sec. After studying the structures of the group II-VI semiconductor thin films by using X-ray spectroscopy, we found that the ZnS, ZnS/CdS, CdS, and CdSe films were hexagonal and exhibited some degree of preferred orientation. Also, the particles of the thin films of II-VI semiconductor compounds proved to be more homogeneous in size compared to those of the powder materials. These results were further verified through scanning electron microscopy(SEM), EDX analysis, and powder and thin film X-ray diffraction.

Effect of a seed layer on atomic layer deposition-grown tin oxide

  • Choi, Woon-Seop
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2009년도 추계학술대회 논문집
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    • pp.128-128
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    • 2009
  • The effect of seed layer on the preparation of tin oxide thin film by ALD using tetrakis(ethylmethylamino) tin precursor was examined. The average growth rate of tin oxide film is about 1.4 A/cycle from $50^{\circ}C$ to $150^{\circ}C$. The rate rapidly decreases at the substrate temperature at $200^{\circ}C$. The seed effect was not observed in crystal growth of thin oxide. However, the crystalline growth of seed material in tin oxide was detected by thermal annealing. ALD-grown seeded tin oxide thin film after thermal annealed was characterized by ellipsometry, XRD, AFM and XPS.

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원자층 증착 기술을 이용한 TiO2 활성층 기반 TFT 연구 (Study on the Thin-film Transistors Based on TiO2 Active-channel Using Atomic Layer Deposition Technique)

  • 김성진
    • 한국전기전자재료학회논문지
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    • 제28권7호
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    • pp.415-418
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    • 2015
  • In this paper, $TiO_2$ based thin-film transistors (TFTs) were fabricated using by an atomic layer deposition with high aspect ratio and excellent step coverage. $TiO_2$ semiconducting layer was deposited showing a rutile phase through the rapid thermal annealing process, and exhibited TFT characteristics with a $200{\mu}m$ channel length of low-leakage currents (none of current flow during off-state), stable threshold voltages (-10 V ~ 0 V), and a much higher on/off current ratio (<$10^5$), respectively.

CIGS Thin Film Solar Cells by Electrodeposition

  • Saji, Viswanathan S.;Lee, Sang-Min;Lee, Chi-Woo
    • 전기화학회지
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    • 제14권2호
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    • pp.61-70
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    • 2011
  • Thin film solar cells with chalcopyrite $CuInSe_2/Cu(In,Ga)Se_2$ absorber materials, commonly known as "CIS/CIGS solar cells" have recently attracted significant research interest as a potential alternative energy-harvesting system for the next generation. Among the different deposition techniques available for the CIGS absorber layer, electrodeposition is an effective and low cost alternative to vacuum based deposition methods. This article reviews progress in the area of CIGS solar cells with an emphasis on electrodeposited absorber layer. Existing challenges in fabrication of stoichiometric absorber layer are highlighted.

STS430 기판을 이용한 Flexible CIGS 박막 태양전지 제조 (Fabrication of Flexible CIGS thin film solar cells using STS430 substrate)

  • 정승철;안세진;윤재호;윤경훈
    • 한국신재생에너지학회:학술대회논문집
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    • 한국신재생에너지학회 2008년도 춘계학술대회 논문집
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    • pp.436-437
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    • 2008
  • Flexible CIGS thin film solar cell was fabricated using STS430 plate as a flexible substrate in this work. A diffusion barrier layer of $SiO_2$ thin film was deposited on STS430 substrate by PECVD followed by deposition of double layered Mo back contact. After depositing CIGS absorber layer by co-evaporation, CdS buffer layer by chemical bath deposition, ZnO window layer by RF sputtering and Al electrode by thermal evaporation, the solar cell fabrication processes were completed and its performance was evaluated. Corresponding solar cell showed an conversion efficiency of 8.35 % with $V_{OC}$ of 0.52 V, $J_{SC}$ of 26.06 mA/$cm^2$ and FF of 0.61.

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펄스레이저증착법을 이용한 $\textrm{LaAlO}_3$ 박막의 Molecular Beam Epitaxy 성장 (Molecular Beam Epitaxy Grouth of $\textrm{LaAlO}_3$ Thin Film by a Pulsed laser Deposition Technique)

  • 김인선;허남회;박용기
    • 한국재료학회지
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    • 제9권1호
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    • pp.25-29
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    • 1999
  • We have developed a laser molecular beam epitaxy system for the layer-by-layer growth of oxide thin films. Using this system, we could grow and control oxide thin films of LaAlO$_3$in a molecular layer epitaxy mode on the atomically flat SrTiO$_3$ substrate with a LaAlO$_3$single crystal target. Very clear RHEED oscillations were observed during to growth of a LaAlO$_3$ film for a long period under the optimized conditions of substrate temperature at $650^{\circ}C$, oxygen pressure at 1$\times$10\ulcorner torr, and an incident laser fluence of 4.6J/$\textrm{cm}^2$. The height of mono-layer-LaAlO$_3$ film grown during one period of RHEED intensity oscillation was 3.8$\AA$.

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Direct Current (DC) Bias Stress Characteristics of a Bottom-Gate Thin-Film Transistor with an Amorphous/Microcrystalline Si Double Layer

  • Jeong, Tae-Hoon;Kim, Si-Joon;Kim, Hyun-Jae
    • Transactions on Electrical and Electronic Materials
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    • 제12권5호
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    • pp.197-199
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    • 2011
  • In this paper, the bottom-gate thin-film transistors (TFTs) were fabricated with an amorphous/microcrystalline Si double layer (DL) as an active layer and the variations of the electrical characteristics were investigated according to the DC bias stresses. Since the fabrication process of DL TFTs was identical to that of the conventional amorphous Si (a-Si) TFTs, it creates no additional manufacturing cost. Moreover, the amorphous/microcrystalline Si DL could possibly improve stability and mass production efficiency. Although the field effect mobility of the typical DL TFTs is similar to that of a-Si TFTs, the DL TFTs had a higher reliability with respect to the direct current (DC) bias stresses.

비정질 Ag/As-Ge-Se-S 다층박막에 형성된 홀로그램 격자의 소거에 관한 연구 (Holographic grating data erasure of amorphous Ag/As-Ge-Se-S multi-layer thin film)

  • 김진홍;구용운;구상모;정홍배
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2006년도 추계학술대회 논문집 Vol.19
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    • pp.112-113
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    • 2006
  • In this paper. we investigated a characteristic of holographic grating data erasure with non-polarized beam at amorphous chalcogenide As-Ge-Se-S thin film. A sample of holographic grating data was formed with DPSS laser for setup. Then, the erasure process was performed with He-Ne laser vertically at sample. As-Ge-Se-S(single layer). Ag/As-Ge-Se-S(double layer) and As-Ge-Se-S/Ag/As-Ge-Se-S(multi-layer) are manufactured to compare their characteristic of erasure.

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AC-PDP에서 MgO 증착조건에 따른 패널특성 연구 (Effect of MgO Deposition Condition on the Discharge Characteristic of AC-PDP)

  • 정주영;조성용;이돈규;이해준;이호준;박정후
    • 전기학회논문지
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    • 제58권8호
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    • pp.1566-1571
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    • 2009
  • The discharge electrodes in ac PDP are coated with dielectric layer, and transparent MgO thin films are deposited on the dielectric layer. The main role of the MgO thin films in ac PDP is to protect the dielectric layer from sputtering by ion bombardment in the glow-discharge plasma. An additional important role of the MgO thin film is the high secondary electron emission coefficient which leads the low firing voltage and low cost of the PDP. In this paper, we investigated the relations of the crystal orientation about deposition thickness, deposition rate, temperature of substrate, and distance between the MgO tablet and the substrate. Additionally, we investigated the discharge characteristics of the AC PDP using nano-powder MgO tablet

Effect of Subthreshold Slope on the Voltage Gain of Enhancement Mode Thin Film Transistors Fabricated Using Amorphous SiInZnO

  • Lee, Sang Yeol
    • Transactions on Electrical and Electronic Materials
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    • 제18권5호
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    • pp.250-252
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    • 2017
  • High-performance full swing logic inverters were fabricated using amorphous 1 wt% Si doped indium-zinc-oxide (a-SIZO) thin films with different channel layer thicknesses. In the inverter configuration, the threshold voltage was adjusted by varying the thickness of the channel layer. The depletion mode (D-mode) device used a TFT with a channel layer thickness of 60 nm as it exhibited the most negative threshold voltage (-1.67 V). Inverters using enhancement mode (E-mode) devices were fabricated using TFTs with channel layer thicknesses of 20 or 40 nm with excellent subthreshold slope (S.S). Both the inverters exhibited high voltage gain values of 30.74 and 28.56, respectively at $V_{DD}=15V$. It was confirmed that the voltage gain can be improved by increasing the S.S value.