• Proceedings of the IEEK Conference
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• 2002.06b
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• pp.185-188
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• 2002

In this paper, Amorphous silicon on glass substrate was recrytallized to poly-crystalline silicon by solid phase crystallization(SPC) technology The active region of thin film transistor(TFT) was fabricated by amorphous silicon. The output and transfer characteristics of thin film transistor with lightly doped drain(LDD) structure was measured and analyzed. As a results, analyzed TFT's reliability with LDD's length by various kinds argument such as sub-threshold swing coefficient, mobility and threshold voltages were evaluated. Stress effects in TFT were able to improve to the characteristics of turn-on current and hot carrier effects by LDD's length variations

• Journal of the Semiconductor & Display Technology
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• v.13 no.1
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• pp.63-66
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• 2014

ZnO is a wide bandgap (3.3 eV) semiconductor with high mobility and good optical transparency. However, off-current characteristics of ZnO thin-film transistor (TFT) need improvements. In this work we studied the variation in ZnO TFT current under different annealing conditions. Annealing usually modifies gas adsorption at grain boundaries of ZnO. When oxygen is adsorbed, electron density decreases due to strong electronegativity of the oxygen, and TFT current decreases as a result. Our experiments showed that current increased after vacuum annealing and decreased after air annealing. We explain that the change of off-current is caused by the desorption and adsorption of oxygen at the grain boundaries.

• JSTS:Journal of Semiconductor Technology and Science
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• v.8 no.2
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• pp.111-114
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• 2008

We studied the influence of nanocrystalline silicon (nc-Si) thin film thickness on top gate nc-Si thin film transistor (TFT) fabricated at $180^{\circ}C$. The nc-Si thickness affects the characteristics of nc-Si TFT due to the nc-Si growth similar to a columnar. As the thickness of nc-Si increases from 40 nm to 200 nm, the grain size was increased from 20 nm to 40 nm. Having a large grain size, the thick nc-Si TFT surpasses the thin nc-Si TFT in terms of electrical characteristics such as field effect mobility. The channel resistance was decreased due to growth of the grain. We obtained the experimental results that the field effect mobility of the fabricated devices of which nc-Si thickness is 60, 90 and 130 nm are 26, 77 and $119\;cm^2/Vsec$, respectively. The leakage current, however, is increased from $7.2{\times}10^{-10}$ to $1.9{\times}10^{-8}\;A$ at $V_{GS}=-4.4\;V$ when the nc-Si thickness increases. It is originated from the decrease of the channel resistance.

• 한국정보디스플레이학회:학술대회논문집
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• 2009.10a
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• pp.310-311
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• 2009

New X-shaped crystalline molecules have been synthesized through various coupling reactions and their electronic properties were investigated. They exhibit good solubility in common organic solvents and good self-film forming properties. They are intrinsically crystalline as they exhibit well-defined X-ray diffraction patterns from uniform and preferred orientations of molecules. They also exhibited high field effect mobilities in thin film transistor (TFT) and good device performances.

• Proceedings of the Korean Vacuum Society Conference
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• 2014.02a
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• pp.276-276
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• 2014

High-performance, fully-transparent, and top-gated oxide thin-film transistor (TFT) was successfully fabricated with Ta2O5 high-k gate dielectric on a glass substrate. Through a self-passivation with the gate dielectric and top electrode, the top-gated oxide TFT was not affected from H2O and O2 causing the electrical instability. Heat-treated InSnO (ITO) was used as the top and source/drain electrode with a low resistance and a transparent property in visible region. A InGaZnO (IGZO) thin-film was used as a active channel with a broad optical bandgap of 3.72 eV and transparent property. In addition, using a X-ray diffraction, amorphous phase of IGZO thin-film was observed until it was heat-treated at 500 oC. The fabricated device was demonstrated that an applied electric field efficiently controlled electron transfer in the IGZO active channel using the Ta2O5 gate dielectric. With the transparent ITO electrodes and IGZO active channel, the fabricated oxide TFT on a glass substrate showed optical transparency and high carrier mobility. These results expected that the top-gated oxide TFT with the high-k gate dielectric accelerates the realization of presence of fully-transparent electronics.

• 한국정보디스플레이학회:학술대회논문집
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• 2006.08a
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• pp.413-418
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• 2006

Highly stable thin-film transistor (TFT) pixel employing both low temperature polycrystalline silicon (LTPS) and amorphous silicon (a-Si) for active matrix organic light emitting diode (AMOLED) is discussed. ELA (excimer laser annealing) LTPS-TFT pixel should compensate $I_{OLED}$ variation caused by the non-uniformity of LTPS-TFT due to the fluctuation of excimer laser energy and amorphous silicon TFT pixel is desired to suppress the decrease of $I_{OLED}$ induced by the degradation of a-Si TFT. We discuss various compensation schemes of both LTPS and a-Si TFT employing the voltage and the current programming.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.11 no.10
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• pp.918-923
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• 1998

Poly-silicon thin film transistors were fabricated on quartz substrates by high temperature processes. Electrical characteristics were measured and compared for 3 transistor structures of Standard Inverted Gate(SIG), Lightly Doped Drain(LDD), and Dual Gate(DG). Leakage currents of DG and LDD TFT's were smaller that od SIG transistor, while ON-current of LDD transistor is much smaller than that of SIG and DG transistors. Temperature dependence of the leakage currents showed that SIG and DG TFT's had thermal generation current at small drian bias and Frenkel-Poole emission current at hight gate and drain biases, respectively. In case of LDD transistor, thermal generation was the dominant mechanism of leakage current at all bias conditions. It was found that the leakage current was closely related to the reduction of the electric field in the drain depletion region.

• Proceedings of the IEEK Conference
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• 2000.06b
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• pp.44-47
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• 2000

본 연구는 α-Si:H TFT(Amorphous Silicon Thin Film Transistor)를 대체 할 펜타센을 활성층으로 사용하는 박막 트랜지스터를 제작에 관한 것이다. 유기 박막 트랜지스터는 유기발광소자와 함께 유연한 디스플레이에 응용된다. 펜타센 박막 트랜지스터의 제작은 채널 길이 25㎛, 70㎛, 소스, 드레인, 게이트 전극으로 Au을 lift off 공정으로 제작하였으며, 펜타센은 OMBD(Organic Molecular Beam Deposition)로 기판온도를 80℃로 유지하여 증착하였다. 제작된 소자로부터 트랜지스터 전류-전압 특성곡선을 측정하였고, 게이트에 의한 채널의 전도도가 조절됨을 확인하였다. 그리고, 전달특성곡선으로부터 문턱전압과 전계효과 이동도를 추출하였다.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.21 no.1
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• pp.1-4
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• 2008

The electrical characteristics of polycrystalline silicon (poly-Si) thin film transistor (TFT) crystallized by excimer laser annealing (ELA) method were evaluated, The polycrystalline silicon thin-film transistor (poly-Si TFT) has higher electric field-effect-mobility and larger drivability than the amorphous silicon TFT. However, to poly-Si TFT's using conventional processes, the temperature must be very high. For this reason, an amorphous silicon film on a buried oxide was crystallized by annealing with a KrF excimer laser (248 nm)to fabricate a poly-Si film at low temperature. Then, High permittivity $HfO_2$ of 20 nm as the gate-insulator was deposited by atomic layer deposition (ALD) to low temperature process. In addition, the solid phase crystallization (SPC) was compared to the ELA method as a crystallization technique of amorphous-silicon film. As a result, the crystallinity and surface roughness of poly-Si crystallized by ELA method was superior to the SPC method. Also, we obtained excellent device characteristics from the Poly-Si TFT fabricated by the ELA crystallization method.

• Transactions on Electrical and Electronic Materials
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• v.1 no.2
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• pp.7-11
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• 2000

a-Si:H and poly-Si TFT(thin film transistor) characteristics were investigated using an inverted staggered type TFT. The TFT an as-grown a-Si:H exhibited a low field effect mobility, transconductance, and high gate threshold voltage. The poly-Si films were achieved by using an isothermal and RTA treatment for glow discharge deposited a-Si:H films. The a-Si:H films were cystallized at the various temperature from 600$^{\circ}C$ to 1000$^{\circ}C$. As anneal temperature was elevated, the TFT exhibited increased g$\sub$m/ and reduced V$\sub$ds/. V$\sub$T/. The poly-Si grain boundary passivation with grain boundary trap types and activation energies as a function of anneal temperature. The poly-si TFT showed an improved I$\sub$nm//I$\sub$off/ ratio of 10$\^$6/, reduced gate threshold voltage, and increased field effect mobility by three orders.