• 한국결정성장학회지
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• 제11권3호
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• pp.111-114
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• 2001

초음파분무를 이용한 MOCVD법으로 전도성 산화물 (Ba,Sr)RuO$_3$ 박막을 Si(100) wafer위에 제조하였다. XRD 측정 결과 BSR박막은 (110) 배향성을 가지고 성장하였으며 500$^{\circ}C$ 이상의 증착온도에서 결정성장이 양호하였다. Ba과 Sr의 조성비의 차이에 따라 AFM 측정결과 Ba에 대한 Sr의 비가 증가함에 따라 grain크기가 증가하였다. 또한 비저항의 측정을 통해 Ba에 대해 Sr의 비의 증가에 따라 BSR 박막의 비저항이 415에서 261$\mu$$\Omega$${\cdot}$cm로 감소하였다.

• 한국마이크로전자및패키징학회:학술대회논문집
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• 한국마이크로전자및패키징학회 2006년도 ISMP 2006
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• pp.125-134
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• 2006

Process & mechanism $\blacklozenge$ The process consists from two steps which are laser processing step and separation steop. $\blacklozenge$ The wavelength of laser beam is transmissible wavelength for the wafer. However, inside of Si wafer is processed due to temperature dependence of optical absorption coefficient Advantage & Application $\blacklozenge$ Advantages are high speed dicing, no debris contaminants, completely dry process, etc. $\blacklozenge$ The cutting edges were fine, The lifetime and endurances did not degrade the device characteristics $\blacklozenge$ A separation of a wafer with DAF was introduced as an application for SiP

• 한국정밀공학회:학술대회논문집
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• 한국정밀공학회 2004년도 추계학술대회 논문집
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• pp.1119-1122
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• 2004

In the UV-NIL process using an elementwise patterned stamp (EPS), which includes channels formed to separate each element with patterns, low-viscosity resin droplets with a nano-liter volume are dispensed on all elements of the EPS. Following pressing of the EPS, the EPS is illuminated with UV light to cure the resin; and then the EPS is separated from several thin patterned elements on a wafer. Experiments on UV-NIL were performed on an EVG620-NIL. 50 － 70 nm features of the EPS were successfully transferred to 4 in. wafers. Especially, the wafer deformation during imprint was analyzed using the finite element method (FEM) in order to study the effect of the wafer deformation on the UV-NIL using EPS.

• 대한기계학회논문집A
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• 제29권4호
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• pp.632-638
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• 2005

The surface lapping process on sapphire wafer was carried out for the epitaxial process of thin film growth of GaN semiconducting material. The planarization of the wafers was investigated by the introduction of the dummy wafers. The diamond lapping process causes the surface deformation of dislocation and micro-cracks. The material deformation due to the mechanical stress was analyzed by the X-ray diffraction and the Vickers indentation. The fracture toughness was increased with the increased annealing temperature indicating the recrystallization at the surface of the sapphire wafer The sudden increase at the temperature of $1200^{\circ}C$ was correlated with the surface phase transition of sapphire from a $-A1_{2}O_{3}\;to\;{\beta}-A1_{2}O_{3}$.

• The Korean Journal of Ceramics
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• 제3권1호
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• pp.18-20
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• 1997

The fabrication process of silicon-diamond(SOD) structure wafer were studied. Microwave plasma chemical vapor deposition (MWPCVD) and annealing technology were used to synthesize diamond film with high resistivity and thermal conductivity. Bonding and etchback silicon-on-diamond (BESOD) were utilized to form supporting substrate and single silicon thin layer of SOD wafer. At last, a SOD structure wafer with 0.3~1$\mu\textrm{m}$ silicon film and 2$\mu\textrm{m}$ diamond film was prepared. The characteristics of radiation for a CMOS integrated circuit (IC) fabricated by SOD wafer were studied.

• Transactions on Electrical and Electronic Materials
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• 제15권2호
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• pp.91-95
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• 2014

This paper presents the structure and process technology of simple and low-cost wafer-level packaging (WLP) for thin film radio frequency (RF) devices. Low-cost practical micromachining processes were proposed as an alternative to high-cost processes, such as silicon deep reactive ion etching (DRIE) or electro-plating, in order to reduce the fabrication cost. Gold (Au)/Tin (Sn) alloy was utilized as the solder material for bonding and hermetic sealing. The small size fabricated WLP of $1.04{\times}1.04{\times}0.4mm^3$ had an average shear strength of 10.425 $kg/mm^2$, and the leakage rate of all chips was lower than $1.2{\times}10^{-5}$ atm.cc/sec. These results met Military Standards 883F (MIL-STD-883F). As the newly proposed WLP structure is simple, and its process technology is inexpensive, the fabricated WLP is a good candidate for thin film type RF devices.

• 한국전기전자재료학회논문지
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• 제15권11호
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• pp.953-957
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• 2002

Single crystal 3C-SiC (cubic silicon carbide) thin-films were deposited on Si(100) wafer up to the thickness of 4.3 ${\mu}{\textrm}{m}$ by APCVD (atmospheric pressure chemical vapor deposition) method using HMDS (hexamethyildisilane; ｛CH$_{3}$｝$_{6}$ Si$_{2}$) at 135$0^{\circ}C$. The HMDS flow rate was 0.5 sccm and the carrier gas flow rate was 2.5 slm. The HMDS flow rate was important to get a mirror-like crystal surface. The growth rate of the 3C-SiC film was 4.3 ${\mu}{\textrm}{m}$/hr. The 3C-SiC epitaxial film grown on Si(100) wafer was characterized by XRD (X-ray diffraction), AFM (atomic force microscopy), RHEED (reflection high energy electron diffraction), XPS (X-ray photoelecron spectroscopy), and Raman scattering, respectively. Two distinct phonon modes of TO (transverse optical) near 796 $cm^{-1}$ / and LO (longitudinal optical) near 974$\pm$1 $cm^{-1}$ / of 3C-SiC were observed by Raman scattering measurement. The heteroepitaxially grown film was identified as the single crystal 3C-SiC phase by XRD spectra (2$\theta$=41.5。).).

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2006년도 하계학술대회 논문집 Vol.7
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• pp.374-375
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• 2006

This paper describes anodic bonding characteristics of MCA to Si-wafer using evaporated Pyrex #7740 glass thin-films for MEMS applications. Pyrex #7740 glass thin-films with the same properties were deposited on MCA under optimum RF sputter conditions (Ar 100 %, input power $1\;W/cm^2$). After annealing at $450^{\circ}C$ for 1 hr, the anodic bonding of MCA to Si-wafer was successfully performed at 600 V, $400^{\circ}C$ in $110^{-6}$ Torr vacuum condition. Then, the MCA/Si bonded interface and fabricated Si diaphragm deflection characteristics were analyzed through the actuation and simulation test. It is possible to control with accurate deflection of Si diaphragm according to its geometries and its maximum non-linearity being 0.05-0.08 %FS. Moreover, any damages or separation of MCNSi bonded interfaces did not occur during actuation test. Therefore, it is expected that anodic bonding technology of MCNSi-wafers could be usefully applied for the fabrication process of high-performance piezoelectric MEMS devices.

• 한국정밀공학회지
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• 제20권4호
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• pp.143-150
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• 2003

Frictional properties of ultra-thin carbon coatings on silicon wafer were investigated based on Taguchi experimental design method. Sensitivity analysis was performed with normal load, relative humidity, deposition process, and coating thickness as the variables. It was found that despite low thickness, the carbon coating resulted in relatively low friction coefficient. Also, the frictional behavior was affected significantly by humidity and normal load.

• 마이크로전자및패키징학회지
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• 제20권3호
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• pp.71-74
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• 2013

본 연구에서는 웨이퍼 레벨 적층 과정에서 발생하는 웨이퍼 오정렬(misalignment) 현상과 웨이퍼 휘어짐(warpage)과의 관계에 대해서 조사하였다. $0.5{\mu}m$ 두께의 구리 박막 증착을 통해 최대 $45{\mu}m$의 휨 크기(bow height)를 갖는 웨이퍼를 제작하였으며, 이 휘어진 웨이퍼와 일반 웨이퍼를 본딩하였을 때 $6{\sim}15{\mu}m$ 정도의 정렬 오차가 발생하였다. 이는 약 $5{\mu}m$의 웨이퍼 확장(expansion)과 약 $10{\mu}m$의 미끄러짐(slip)의 복합 거동으로 설명할 수 있으며, 웨이퍼 휘어짐의 경우 확장 오정렬보다 본딩 과정에서의 미끄러짐 오정렬에 주로 기여하는 것으로 보인다.