• Korean Journal of Materials Research
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• v.12 no.10
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• pp.820-824
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• 2002

It is of importance to know that the bonding strength and interfacial stress of SOI wafer pairs to meet with mechanical and thermal stresses during process. We fabricated Si/2000$\AA$-SiO$_2$ ∥ 2000$\AA$-SiO$_2$/Si SOI wafer pairs with electric furnace annealing, rapid thermal annealing (RTA), and fast linear annealing (FLA), respectively, by varying the annealing temperatures at a given annealing process. Bonding strength and interfacial stress were measured by a razor blade crack opening method and a laser curvature characterization method, respectively. All the annealing process induced the tensile thermal stresses. Electrical furnace annealing achieved the maximum bonding strength at $1000^{\circ}C$-2 hr anneal, while it produced constant thermal tensile stress by $1000^{\circ}C$. RTA showed very small bonding strength due to premating failure during annealing. FLA showed enough bonding strength at $500^{\circ}C$, however large thermal tensile stress were induced. We confirmed that premated wafer pairs should have appropriate compressive interfacial stress to compensate the thermal tensile stress during a given annealing process.

• JSTS:Journal of Semiconductor Technology and Science
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• v.5 no.2
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• pp.83-88
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• 2005

The interface-states between the top silicon layer and buried oxide layer of nano-SOI substrate were developed. Also, the effects of thermal treatment processes on the interface-state distributions were investigated for the first time by using pseudo-MOSFETs. We found that the interface-state distributions were strongly influenced by the thermal treatment processes. The interface-states were generated by the rapid thermal annealing (RTA) process. Increasing the RTA temperature over $800^{\circ}C$, the interface-state density considerably increased. Especially, a peak of interface-states distribution that contributes a hump phenomenon of subthreshold curve in the inversion mode operation of pseudo-MOSFETs was observed at the conduction band side of the energy gap, hut it was not observed in the accumulation mode operation. On the other hand, the increased interface-state density by the RTA process was effectively reduced by the relatively low temperature annealing process in a conventional thermal annealing (CTA) process.

• Transactions on Electrical and Electronic Materials
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• v.3 no.1
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• pp.42-45
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• 2002

Properties of lead zirconate titanate ferroelectric thin films prepared by rapid thermal annealing/direct insertion thermal annealing were investigated. The remnant polarization (Pr), saturation polarization (Ps), and coercive force (Ec) of typical samples annealed by rapid thermal annealing (RTA) are about 13.7 $\mu$ C/cm$^2$, 27.1 $\mu$C/cm$^2$, and 55.6 kV/cm, respectively. The dielectric constant of the sample is about 786, the dielectric loss tangent is about 2.4% at 1 kHz. Furthermore, ferroelectric, conduction, and piezoelectric properties of the thin films annealed by RTA process and the direct insertion thermal annealing (DITA) process were compared. The influence of temperature in the dry process on the above properties was also investigated.

• Proceedings of the KIEE Conference
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• 2006.07c
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• pp.1424-1425
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• 2006

A four-step rapid thermal annealing (RTA) process is proposed in order to improve the throughput and stabilize the process, compared to the six-step RTA process. Effects of annealing on the properties of a structure mode of CMOS process in both cases were investigated. The implanted dopant(As, $BF_2$ and Ti/TiN) movement in silicon during different rapid thermal annealing conditions was studied using secondary ion mass spectroscopy (SIMS) technique. These results show that the four-step RTA process significantly improves time effect and throughput (15%) by the condition of ramping up compared to the six-step RTA process.

• Advances in nano research
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• v.1 no.4
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• pp.193-202
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• 2013

In this article, we present the effects of Ag doping and after-growth thermal annealing on the photoluminescence (PL) and thermoluminescence (TL) behaviors of $SnO_2$ nanoparticles. $SnO_2$ nanoparticles of 4-7 nm size range containing different Ag contents were synthesized by hydrothermal process. It has been observed that the after-growth thermal annealing process enhances the crystallite size and stabilizes the TL emissions of $SnO_2$ nanostructures. Incorporated Ag probably occupies the interstitial sites of the $SnO_2$ lattice, affecting drastically their emission behaviors on thermal annealing. Both the TL response and dose-linearity of the $SnO_2$ nanoparticles improve on 1.0% Ag doping, and subsequent thermal annealing. However, a higher Ag content causes the formation of Ag clusters, reducing both the TL and PL responses of the nanoparticles.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2005.07a
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• pp.466-467
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• 2005

Al doped zinc oxide films (ZnO:Al) were deposited on glass substrate by RF magnetron sputtering from a ZnO target mixed with 2 wt% $Al_2O_3$. The as-deposited ZnO:Al films were rapid-thermal annealed. Electrical properties and structural evolution of the films, as annealed by rapid thermal process (RTP), were studied and compared with the films annealed by conventional annealing process. RTP, the (002) peak intensity increases and the electrical resistivity decreases by 20%, after RT annealing. The effects of RT annealing on the structural evolution and electrical properties of RF sputtered films were further discussed and compared also with the films deposited by DC magnetron sputtering.

• Transactions of Materials Processing
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• v.13 no.3
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• pp.205-210
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• 2004

The waveguide Bragg gratings have been fabricated by the phase-mask method. An excimer laser with maximum 600mJ output pulse energy and uniform phase masks have been used. Hydrogen loading is often used for enhancing the uv photosensitivity of the core, however, the resultant gratings show significant aging effect. In the present study, high temperature thermal annealing process has been investigated to obtain thermal gratings and process parameters are deduced.

• 한국정보디스플레이학회:학술대회논문집
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• 2009.10a
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• pp.1571-1572
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• 2009

Polymer solar cells were fabricated with gravure printing process and the effect of thermal annealing of gravure printed organic layer was investigated. The layer structure of polymer solar cells is glass / ITO / hole transfer layer / active layer / Al structure was fabricated. For the active layer, 1:1 ratio of poly-3-hexylthiophene (P3HT) and [6,6]-phenyl C61-butyric acid methyl ester (PCBM) mixture was applied. The P3HT/PCBM blend was gravure printed onto the substrates. The effect of thermal annealing was investigated by changing annealing time and the number of printing. Maximum 3.6% of power conversion efficiency was achieved with gravure printing of organic layer and thermal annealing in this work.

• JSTS:Journal of Semiconductor Technology and Science
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• v.8 no.3
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• pp.239-243
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• 2008

In this study, Bi-Sb thin film structure was prepared by thermal evaporation method. The electrical, optical transmission and structural characteristics of the prepared samples were introduced before and after thermal annealing process. At temperature of $500^{\circ}C$, the absorption of the structure was improved to reach 97% at near-infrared region. As well, the thermal annealing caused to reduce the bulk resistance of the Bi-Sb thin film structure. The morphology of Bi-Sb structure was also improved by thermal annealing as characteristic islands of the structure appear clearly in form hexagonal areas distinct from each other. This study is aiming to examine such structures if they are employed as photonic devices such as photodetectors, LED's and optical switches.

• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.289.2-289.2
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• 2016

In-Ga-Zn-O(IGZO) receive great attention as a channel material for thin film transistors(TFTs) as next-generation display panel backplanes due to its superior electrical and physical properties such as a high mobility, low off-current, high sub-threshold slope, flexibility, and optical transparency. For the purpose of fabricating high performance IGZO TFTs, a thermal recovery process above a temperature of $300^{\circ}C$ is required for recovery or rearrangement of the ionic bonding structure. However diffused metal atoms from source/drain(S/D) electrodes increase the channel conductivity through the oxidation of diffused atoms and reduction of $In_2O_3$ during the thermal recovery process. Threshold voltage ($V_{TH}$) shift, one of the electrical instability, restricts actual applications of IGZO TFTs. Therefore, additional investigation of the electrical stability of IGZO TFTs is required. In this paper, we demonstrate the effect of Ti diffusion and modulation of interface traps by carrying out an annealing process on IGZO. In order to investigate the effect of diffused Ti atoms from the S/D electrode, we use secondary ion mass spectroscopy (SIMS), X-ray photoelectron spectroscopy, HSC chemistry simulation, and electrical measurements. By thermal annealing process, we demonstrate VTH shift as a function of the channel length and the gate stress. Furthermore, we enhance the electrical stability of the IGZO TFTs through a second thermal annealing process performed at temperature $50^{\circ}C$ lower than the first annealing step to diffuse Ti atoms in the lateral direction with minimal effects on the channel conductivity.