• Title/Summary/Keyword: Thermal Warpage

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Warpage and Solder Joint Strength of Stacked PCB using an Interposer (인터포저를 이용한 Stacked PCB의 휨 및 솔더 조인트 강도 연구)

  • Kipoong Kim;Yuhwan Hwangbo;Sung-Hoon Choa
    • Journal of the Microelectronics and Packaging Society
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    • v.30 no.3
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    • pp.40-50
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    • 2023
  • Recently, the number of components of smartphones increases rapidly, while the PCB size continuously decreases. Therefore, 3D technology with a stacked PCB has been developed to improve component density in smartphone. For the s tacked PCB, it i s very important to obtain solder bonding quality between PCBs. We investigated the effects of the properties, thickness, and number of layers of interposer PCB and sub PCB on warpage of PCB through experimental and numerical analysis to improve the reliability of the stacked PCB. The warpage of the interposer PCB decreased as the thermal expansion coefficient (CTE) of the prepreg decreased, and decreased as the glass transition temperature (Tg) increased. However, if temperature is 240℃ or higher, the reduction of warpage is not large. As FR-5 was applied, the warpage decreased more compared to FR-4, and the higher the number and thickness of the prepreg, the lower the warpage. For sub PCB, the CTE was more important for warpage than Tg of the prepreg, and increase in prepreg thickness was more effective in reducing the warpage. The shear tests indicated that the dummy pad design increased bonding strength. The tumble tests indicated that crack occurrence rate was greatly reduced with the dummy pad.

Numerical Analysis of Warpage and Stress for 4-layer Stacked FBGA Package (4개의 칩이 적층된 FBGA 패키지의 휨 현상 및 응력 특성에 관한 연구)

  • Kim, Kyoung-Ho;Lee, Hyouk;Jeong, Jin-Wook;Kim, Ju-Hyung;Choa, Sung-Hoon
    • Journal of the Microelectronics and Packaging Society
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    • v.19 no.2
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    • pp.7-15
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    • 2012
  • Semiconductor packages are increasingly moving toward miniaturization, lighter and multi-functions for mobile application, which requires highly integrated multi-stack package. To meet the industrial demand, the package and silicon chip become thinner, and ultra-thin packages will show serious reliability problems such as warpage, crack and other failures. These problems are mainly caused by the mismatch of various package materials and geometric dimensions. In this study we perform the numerical analysis of the warpage deformation and thermal stress of 4-layer stacked FBGA package after EMC molding and reflow process, respectively. After EMC molding and reflow process, the package exhibits the different warpage characteristics due to the temperature-dependent material properties. Key material properties which affect the warpage of package are investigated such as the elastic moduli and CTEs of EMC and PCB. It is found that CTE of EMC material is the dominant factor which controls the warpage. The results of RSM optimization of the material properties demonstrate that warpage can be reduced by $28{\mu}m$. As the silicon die becomes thinner, the maximum stress of each die is increased. In particular, the stress of the top die is substantially increased at the outer edge of the die. This stress concentration will lead to the failure of the package. Therefore, proper selection of package material and structural design are essential for the ultra-thin die packages.

Thermophysical Properties of PWB for Microelectronic Packages with Solder Resist Coating Process (마이크로 전자패키지용 Printed Wiring Board의 솔더레지스트공정에 따른 열적특성)

  • 이효수
    • Journal of the Microelectronics and Packaging Society
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    • v.10 no.3
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    • pp.73-82
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    • 2003
  • Recently, PWB(Printed Wiring Board) has been recognized in the field of microelectronic package as core technology for designing or manufacturing. PWB is the structure stacked by several materials with different thermophysical properties, which shows the different CTEs(Coefficient or Thermal Expansions) during the fabrication process and causes a lot of defects such as warpage, shrinkage, dimension, etc. Thermal deformation of PWB is affected mainly by the volume change of solder-resist among fabrication parameters. Therefore, thermal deformation of PBGA and CSP consisting of 2 layers and 4 layers was studied with solder-resist process. When over 30% in volume fraction of solder-resist, thermal deformation of 2-layered PWB was min. 40% higher than that of 4-layered PWB because 4-layered PWB contained the layer with high toughness such as prepreg, which counterbalanced the thermal deformation of solder-resist. Otherwise, when below 30%, PWB showed similar thermal deformation without regard to layers and design.

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Measurement and Evaluation of Thermal Expansion Coefficient for Warpage Analysis of Package Substrate (패키지 기판의 Warpage 해석을 위한 열팽창계수의 측정 및 평가)

  • Yang, Hee Gul;Joo, Jin Won
    • Transactions of the Korean Society of Mechanical Engineers A
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    • v.38 no.10
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    • pp.1049-1056
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    • 2014
  • Microelectronics components contain various materials with different coefficients of thermal expansion (CTE). Although a large amount of published data on the CTE of standard materials is available, it occasionally becomes necessary to measure this property for a specific actual material over a particular temperature range. A change in the temperature of a material causes a corresponding change in the output of the strain gage installed on the specimen because of not only the mechanical load but also the temperature change. In this paper, a detailed technique for CTE measurement based on these thermal characteristics of strain gages is proposed and its reliability is evaluated. A steel specimen, aluminum specimen, and copper specimen, whose CTE values are well known, were used in this evaluation. The proposed technique was successfully applied to the measurement of the CTE of a coreless package substrate composing of electronics packages.

Characterization for Viscoelasticity of Glass Fiber Reinforced Epoxy Composite and Application to Thermal Warpage Analysis in Printed Circuit Board (유리섬유강화 복합재의 점탄성 특성 규명 및 인쇄회로기판 열변형해석에의 적용)

  • Song, Woo-Jin;Ku, Tae-Wan;Kang, Beom-Soo;Kim, Jeong
    • Transactions of the Korean Society of Mechanical Engineers A
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    • v.34 no.2
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    • pp.245-253
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    • 2010
  • The reliability problems of flip chip packages subjected to temperature change during the packaging process mainly occur due to mismatches in the coefficients of thermal expansion as well as features with time-dependent material properties. Resin molding compounds like glass fiber reinforced epoxy composites used as the dielectric layer in printed circuit boards (PCB) strongly exhibit viscoelastic behavior, which causes their Young's moduli to not only be temperature-dependent but also time-dependent. In this study, the stress relaxation and creep tests were used to characterize the viscoelastic properties of the glass fiber reinforced epoxy composite. Using the viscoelastic properties, finite element analysis (FEA) was employed to simulate thermal loading in the pre-baking process and predict thermal warpage. Furthermore, the effect of viscoelastic features for the major polymeric material on the dielectric layer in the PCB (the glass fiber reinforced epoxy composite) was investigated using FEA.

Sensitivity Enhancement of Shadow Moiré Technique for Warpage Measurement of Electronic Packages (반도체 패키지의 굽힘변형 측정을 위한 그림자 무아레의 감도향상 기법연구)

  • Lee, Dong-Sun;Joo, Jin-Won
    • Journal of the Microelectronics and Packaging Society
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    • v.22 no.3
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    • pp.57-65
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    • 2015
  • Electronic packages consist of various materials, and as temperature changes, warpage occurs because of the difference in coefficient of thermal expansion. Shadow $moir{\acute{e}}$ is non-contact, whole field measurement technique for out-of-plane displacement. However, the technique has low sensitivity above $50{\mu}m/fringe$, it is not adequate for the warpage measurement in some circumstance. In this paper, by applying phase shifting process to the traditional shadow $moir{\acute{e}}$, measurement system having enhanced sensitivity of $12.5{\mu}m/fringe$ is constructed. Considering Talbot effect, the measurement is carried out in the half Talbot area. Shadow fringe pattern having four times enhanced sensitivity is obtained by the image process with four shadow fringes. The measurement technique is applied to the fibered package substrate and coreless package substrate for measuring warpages at room temperature and at about $100^{\circ}C$.

Cure Properties of Novel Epoxy Resin Systems for WLP (Wafer Level Package) According to the Change of Hardeners (경화제 변화에 따른 WLP(Wafer Level Package)용 신규 Epoxy Resin System의 경화특성)

  • Kim, Whan Gun
    • Journal of the Semiconductor & Display Technology
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    • v.21 no.2
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    • pp.57-67
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    • 2022
  • The curing characteristics of naphthalene type epoxy resin systems according to the change of curing agent were investigated to develop a new next-generation EMC(Epoxy Molding Compound) with excellent warpage characteristics, low thermal expansion, and excellent fluidity for WLP(Wafer Level Package). As epoxy resins, DGEBA, which are representative bisphenol type epoxy resins, NE-16, which are the base resins of naphthalene type epoxy resins, and NET-OH, NET-MA, and NET-Epoxy resins newly synthesized based on NE-16 were used. As a curing agent, DDM (Diamino Diphenyl Methane) and CBN resin with naphthalene moiety were used. The curing reaction characteristics of these epoxy resin systems with curing agents were analyzed through thermal analysis experiments. In terms of curing reaction mechanism, DGEBA and NET-OH resin systems follow the nth curing reaction mechanism, and NE-16, NET-MA and NET-Epoxy resin systems follow the autocatalytic curing reaction mechanism in the case of epoxy resin systems using DDM as curing agent. On the other hand, it was found that all of them showed the nth curing reaction mechanism in the case of epoxy resin systems using CBN as the curing agent. Comparing the curing reaction rate, the epoxy resin systems using CBN as the curing agent showed a faster curing reaction rate than them with DDM as a hardener in the case of DGEBA and NET-OH epoxy resin systems following the same nth curing reaction mechanism, and the epoxy resin systems with a different curing mechanism using CBN as a curing agent showed a faster curing reaction rate than DDM hardener systems except for the NE-16 epoxy resin system. These reasons were comparatively explained using the reaction rate parameters obtained through thermal analysis experiments. Based on these results, low thermal expansion, warpage reduction, and curing reaction rate in the epoxy resin systems can be improved by using CBN curing agent with a naphthalene moiety.

Heat Transfer Analysis of Infrared Reflow Soldering Process for Attaching Electronic Components to Printed Circuit Boards (전자부품의 인쇄회로기판 부착시 적외선 Reflow Soldering과정 열전달 해석)

  • Son, Young-Seok
    • Journal of Welding and Joining
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    • v.15 no.6
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    • pp.105-115
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    • 1997
  • A numerical study is performed to predict the thermal response of a detailed card assembly during infrared reflow soldering. The card assembly is exposed to discontinuous infrared panel heater temperature distributions and high radiative/convective heating and cooling rates at the inlet and exit of the oven. The convective, radiative and conduction heat transfer within the reflow oven as well as within the card assembly are simulated and the predictions illustrate the detailed thermal responses. The predictions show that mixed convection plays an important role with relatively high frequency effects attributed to buoyancy forces, however the thermal response of the card assembly is dominated by radiation. The predictions of the detailed card assembly thermal response can be used to select the oven operating conditions to ensure proper solder melting and minimization of thermally induced card assembly tresses and warpage.

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Analysis of Thermal Deformation of Carbon-fiber Reinforced Polymer Matrix Composite Considering Viscoelasticity (점탄성을 고려한 탄소 섬유강화 복합재의 열 변형 유한요소 해석)

  • Jung, Sung-Rok;Kim, Wie-Dae;Kim, Jae-Hak
    • Composites Research
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    • v.27 no.4
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    • pp.174-181
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    • 2014
  • This study describes viscoelasticity analysis of carbon-fiber reinforced polymer matrix composite material. One of the most important problem during high temperature molding process is residual stress. Residual stress can cause warpage and cracks which can lead to serious defects of the final product. For the difference in thermal expansion coefficient and change of resin property during curing, it is difficult to predict the final deformed shape of carbon-fiber reinforced polymer matrix composite. The consideration of chemical shrinkage can reduce the prediction errors. For this reason, this study includes the viscoelasticity and chemical shrinkage effects in FE analysis by creating subroutines in ABAQUS. Analysis results are compared with other researches to verify the validity of the subroutine developed, and several stacking sequences are introduced to compare tested results.

Measurement of EMC/PCB Interfacial Adhesion Energy of Chip Package Considering Warpage (휨을 고려한 칩 패키지의 EMC/PCB 계면 접합 에너지 측정)

  • Kim, Hyeong Jun;Ahn, Kwang Ho;Oh, Seung Jin;Kim, Do Han;Kim, Jae Sung;Kim, Eun Sook;Kim, Taek-Soo
    • Journal of the Microelectronics and Packaging Society
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    • v.26 no.4
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    • pp.101-105
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    • 2019
  • The adhesion reliability of the epoxy molding compound (EMC) and the printed circuit board (PCB) interface is critical to the quality and lifetime of the chip package since the EMC protects PCB from the external environment during the manufacturing, storage, and shipping processes. It is necessary to measure adhesion energy accurately to ensure product reliability by optimizing the manufacturing process during the development phase. This research deals with the measurement of EMC/PCB interfacial adhesion energy of chip package that has warpage induced by the coefficient of thermal expansion (CTE) mismatch. The double cantilever beam (DCB) test was conducted to measure adhesion energy, and the spring back force of specimens with warpage was compensated to calculate adhesion energy since the DCB test requires flat substrates. The result was verified by comparing the adhesion energy of flat chip packages come from the same manufacturing process.