• 연구논문집
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• s.32
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• pp.35-43
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• 2002

This study was performed to develop accelerated life test method of machanical parts using cumulative damage theory that used to model the fatigue of parts that receive variable load. The cumulative damage theory was introduced, and the estimation of life and calculation of accelerated life test time was illustrated. As the actual application example, accelerated life test method of agricultural tractor transmission was described. Life distribution of agricultural tractor transmission was supposed to follow Weibull distribution and life test time was calculated under the conditions of average life (MTBF) 3,000 hours and 90% reliability for one test sample. According to the cumulative damage theory, because test time can shorten in case increase test load, test time could be reduced by 482 hours when we put the load 1.1 times of rated load than 0.73 times of rated load that is equivalent load calculated by load spectrum of the agricultural tractor. This time, acceleration coefficient was 11.7. This accelerated test method was used to develop accelerated test method of gear reducer, hydraulic hose and bearing as well as agricultural tractor transmission and it is considered to be applied comprehensively to machanical parts the fatigue of which is happened by load or pressure etc.

• The KIPS Transactions:PartD
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• v.13D no.7 s.110
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• pp.923-930
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• 2006

In this paper we design the system test model for the weapon system embedded software based on the Time Factor Method(TFM) considering time factors and suggest the results through the case study. For doing this, we discuss the features, system tests and the object-oriented model based UML notations of the weapon system embedded software. And we give a test method considering time factors, a measuring method to time factors, and a test case selection algorithm as an approach to the TFM for designing the system test model. The TFM based system test model consists of three factors (X, Y, Z) in the weapon system embedded software. With this model, we can extract test cases through the selection algorithm for a maximum time path in 'X', identify the objects related to the Sequence Diagram in 'Y' and measure the execution time of each objects which is identified by the Timing Diagram in 'Z' Also, we present the method of extracting the system test cases by applying the proposed system test model to the 'Multi-function missile defense system'.

• Journal of Information Processing Systems
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• v.7 no.2
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• pp.363-384
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• 2011

As the complexity of software is increasing, generating an effective test data has become a necessity. This necessity has increased the demand for techniques that can generate test data effectively. This paper proposes a test data generation technique based on adequacy based testing criteria. Adequacy based testing criteria uses the concept of mutation analysis to check the adequacy of test data. In general, mutation analysis is applied after the test data is generated. But, in this work, we propose a technique that applies mutation analysis at the time of test data generation only, rather than applying it after the test data has been generated. This saves significant amount of time (required to generate adequate test cases) as compared to the latter case as the total time in the latter case is the sum of the time to generate test data and the time to apply mutation analysis to the generated test data. We also use genetic algorithms that explore the complete domain of the program to provide near-global optimum solution. In this paper, we first define and explain the proposed technique. Then we validate the proposed technique using ten real time programs. The proposed technique is compared with path testing technique (that use reliability based testing criteria) for these ten programs. The results show that the adequacy based proposed technique is better than the reliability based path testing technique and there is a significant reduce in number of generated test cases and time taken to generate test cases.

• Transactions of the Korean Society of Mechanical Engineers A
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• v.35 no.3
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• pp.325-331
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• 2011

A new method to predict the proper promotion time on the near-step-temperature test profile when heating or cooling the test-piece in a test chamber to the test temperature for environmental tests has been proposed by using the lumped analysis. For a given test condition the analysis shows the existence of a promotion time that reduces the testing time and saves energy. The theoretical results are in reasonably good agreements with experimental results for steel specimens. The suggested promotion time is approximately proportional to the mass/surface area of the test-piece for a given material.

• 제어로봇시스템학회:학술대회논문집
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• 1991.10a
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• pp.974-978
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• 1991

Electro-pneumatic valve is an electro-mechanical device which converts electric signal into pneumatic flow mu or pressure. A measurement of dynamic response time is very important to evaluate valve performance. Dynamic response time of electro-pneumatic valve has a variation accordance with valve types, operating way and test standard. In this study, automatic measurement system of dynamic response time is composed based on test condition of dynamic response time test standard(CETOP, JIS). Also, in this study test pressure variation characteristics accordance with variation of solenoid excitation power, and we developed dynamic response measurement system enable to compare of and analyze these two characteristics.

• Journal of the Korean Solar Energy Society
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• v.30 no.5
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• pp.63-68
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• 2010

To guarantee life time more than 20 years for manufacturer without stopping photovoltaic(PV) system, it is really important to test the module in realistic time and condition compared to outside weather. In here, we tested PV modules in highly stressed condition compared to IEC standards. In IEC 61215 and IEC 61646 standards, damp-heat, thermal cycle(TC200) and mechanical test are main test items for evaluating long-term durability of PV module in controlled temperature and humidity condition. So in this paper, we have lengthened the test time for TC200 and damp-heat test and increased the loading stress on surface of module. Through this test, we can get some clue of proper the method for measuring realistic life cycle of PV modules and suggested the minimum time for PV test method. The detail description is specified as the following paper.

• JSTS:Journal of Semiconductor Technology and Science
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• v.14 no.3
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• pp.345-355
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• 2014

Today's System-on-a-Chip (SoC) is designed with reusable IP cores to meet short time-to-market requirements. However, the increasing cost of testing becomes a big burden in manufacturing a highly integrated SoC. In this paper, an efficient parallel scan test technique is introduced to minimize the test application time. Multiple scan enable signals are adopted to implement scan architecture to achieve optimal test application time for the test patterns scheduled for concurrent scan test. Experimental results show that testing times are considerably reduced with little area overhead.

• Proceedings of the KIEE Conference
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• 2002.11c
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• pp.257-263
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• 2002

Test scheduling of SoC becomes more important because it is one of the prime methods to minimize the testing time under limited power consumption of SoCs. In this paper, a heuristic algorithm, in which test resources are selected for groups and arranged based on the size of product of power dissipation and test time together with total power consumption in core-based SoCs is proposed. We select test resource groups which has maximum power consumption but does not exceed the constrained power consumption and make the testing time slot of resources in the test resource group to be aligned at the initial position to minimize the idle test time of test resources.

• Proceedings of the IEEK Conference
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• 2000.07a
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• pp.367-370
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• 2000

It is shown that $I_{DDQ}$ testing is very useful for shipping fault-free CMOS ICs. However, test time of $I_{DDQ}$ testing is extremely larger than one of logic testing. In this paper, a new test input sequence generation methodology is proposed to reduce the test time of $I_{DDQ}$ testing. At first, it is Shown that $I_{DDQ}$ test time Will be denominated by charge supply current for load capacitance of gates whose output logic values are changed by test input vector application and the charge current depends on input sequence of test vectors. After that, a test input sequence generation methodology is proposed. The feasibility is checked by some experiments.riments.

• Journal of the Korean Statistical Society
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• v.27 no.4
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• pp.451-458
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• 1998

Problem of testing linearity among general class of first order nonlinear time series models is discussed. The null hypotheses of linearity is identified via conditional expectations. A consistent test is then suggested and relevant limiting results are derived. It is worth indicating that any specific alternatives are not specified.