• Journal of the Korean Institute of Telematics and Electronics S
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• v.34S no.7
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• pp.102-111
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• 1997

In this paper, a patern recognition method of surface mount device(SMD) IC using wavelet transform and neural network is proposed. We chose the feature parameter according to the characteristics of coefficient matrix which is obtained from four level discrete wavelet transform (DWT). These feature parameters are normalized and then used for the input vector of neural network which is capable of adapting the surroundings such as variation of illumination, arrangement of objects and translation. Experimental results show that when the same form of feature pattern, as is used for learning, is put into neural network and gained 100% rate ofrecognition irrespective of SMD IC kinds, location and variation of illumination. In the case of unused feature pattern for learning, the recognition rate is 85.9% under the similar surroundings, where as an average recognition rate is 96.87% for the case of reregulated value of illumination. Proosed method is relatively simple compared with the traditional space domain method in extracting the feature parameter and is also well suited for recognizing the pattern's class, position and existence. It can also shorten the processing tiem better than method extracting feature parameter with the use of discrete cosine transform(DCT) and adapt the surroundings such as variation of illumination, the arrangement and the translation of SMD IC.

• Journal of the Korean Institute of Telematics and Electronics S
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• v.35S no.11
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• pp.28-36
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• 1998

In the CDMA mobile communication system with asynchronous mode among base stations, the initial PN code acquisition method using a matched filter can be considered for the rapid PN code synchronization acquisition in the handoff region. In the model of the noncoherent QPSK/DS-SS under the Rayleigh fading channel, the mean acquisttion time of the matched filter is analyzed to have a shortened time in proportion to the length of matched filter to be compared with the serial correlation method. In this paper to improve the HW complexity of the conventional matched device which enables the repeated correlation process, is designed and its function is verified through the FPGAsimulation using Altera MaxPlus Ⅱ.

• Journal of the Korean Institute of Telematics and Electronics
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• v.11 no.6
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• pp.38-43
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• 1974

A design problem is studied for a nonuniform transmission line (NUTL) section to be inserted between an arbitrary source impedance and an arbitary load impedance for the purpose of impedance matching or providing a minimum input reflection coefficient over a frequency ranee as wide as possible. A special class of NUTL's, yet comprehensive enough to include almost all smoothly varying lines, are considered. Power series expansions of the ABCD parameters of such lines are used in the calculation of the input reflection coefficient. The design problem is formulated as a nonlinear programming problem withnonlinear constraints and is solved by a combined use of the sequential unconstrained minimization technique and tile Fletcher-Powell method. As a result, a line section was obtained which shows a marked improvement over any one hitherto published as a wide-band impedance matching device.

• The Journal of the Korea institute of electronic communication sciences
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• v.10 no.4
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• pp.483-490
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• 2015

In this paper, The UBI(: Usage Based Insurance) insurance products for existing and analyze a variety of data pertaining to the operation or disposition or utilization of advanced telematics devices, such as digital recording device operates as a means to identify the insured or the insurer operates in real time recording (monitoring). Therefore, this study performs a city in wireless communication infrastructure functions Traffic Information System : leverage(UTIS : Urban Traffic Information System) and to develop a system that linked insurance products, such as PAYD, PHYD and MHYD. Utilizing the UTIS systems and analyze the driver's vehicle driving recorder tendencies.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.35D no.8
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• pp.8-14
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• 1998

A new process is developed to improve the electrical characteristics of high .beta. and low saturation voltage power transistor for lamp solenoid driver application. To prevent punch-through breakdown, appropriate combination of base doping and base width is necessary in the range of operating voltage of the circuit. The optimum values of base doping and sheet resistance are $Q_{D}$= $1.5{\times}10^{14}$atoms/$\textrm{cm}^2$ and $R_{s}$= 350 $\Omega/\square$ base wodtj $W_{B}$= $2.5{\mu}m$respectively. Under this condition it is possible to control $\beta$ of the transistor to 1500, maintaining $VB_{CBO}$ =200V. To reduce scattered distribution of .beta. of the devices on the wafer, it is necessary to improve emittter predeposition process. As a result, scattered distribution of .beta. of the devices on the wafer was reduced to 1/6 by using the new process. To improve collector to emitter forward voltage drop, $V_{ECF}$ of damper diode, an additional silicon etching process is used, which resulted in improving the value of $V_{eCF}$ from 2.8 V to 1.8V. With the suggested process superior device performance and higher yield are achieved.

• Journal of Institute of Control, Robotics and Systems
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• v.15 no.8
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• pp.823-830
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• 2009

For developing automotive parts and telematics devices the real car test often shows limitation because it needs high cost, much time and has the possibility of the accident. Therefore, a Vehicle Driving Simulator (VDS) instead of the real-car test has been used by some automotive manufactures, research centers, and universities. The VDS is a virtual reality device which makes a human being feel as if one drives a vehicle actually. Unlike actual vehicle, the simulator has limited kinematic workspace and bounded dynamic characteristics. So it is difficult to simulate dynamic motions of a multi-body vehicle model fully. In order to overcome these problems, a washout algorithm which restricts workspace of the simulator within the kinematic limits is needed, and analysis of dynamic characteristics is required also. However, a classical washout algorithm contains several problems such as time delay and generation of wrong motion signal caused by characteristics of filters. Specially, the classical washout algorithm has the simulator sickness when driver hardly turns brakes and accelerates the VDS. In this paper, a new washout algorithm is developed to enhance the motion sensitivity and improve the simulator sickness by using the vehicle tilt signal which is generated in the real time vehicle dynamic model.

• Journal of the Korean Institute of Telematics and Electronics
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• v.22 no.2
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• pp.90-96
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• 1985

The properties of plasma-enhanced CVD phosphorous silicate glass (PECVD PSG) for passivation layer are studied . Phosphorous contentration was analyzed with X-ray fluores-cence. As a result, PECVD PSG has a limiting phosphors concentration of about 8 mole%. Curves relating to etcll rate, infrared absorption ratio, and sheet resistivity were adapted to monitor phosphorous concentration indirectly Dielectric properties, step coverage, crack resistance, and gettering effect are discussed in both of atmospheric pressure CVD (APCVO) and PECVD oxide. PECVD SiO2 film have density of about 2.4 g/㎤ at deposition rate of 450$\AA$/min, refractive index of about 1.53, and breakdown at fields of II-13 MV/cm. Crack resistance of PECVD oxide is greater than APCVD oxide. PECVD PSG films contained with 2 mole % phosphorous show good step coverage and gettering ability. The obtained results show more advantages in PECVD PSG than in APCVD PSG for device passivation.

• Journal of the Korean Institute of Telematics and Electronics
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• v.25 no.11
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• pp.1304-1314
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• 1988

An experimental study of the influences of HF concentration, current density, reaction time and the silicon surface, on the formation and properties of porous silicon are reported. The SOI (Silicon-On-Insulator) strip lines with 100 um width are fabricated at room temperature by anodic oxidation of PSL (Porous Silicon Layers). The stress on the silicon island induced by the anodic oxidation can be avoided by the two-step PSL formation technique. At the final step of IC fabrication process, device isolation will be achieved at room temperature by this method.

• Journal of the Korean Institute of Telematics and Electronics
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• v.25 no.11
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• pp.1286-1293
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• 1988

A general closed form expression for the channel length of the self-aligned double-diffused MOS transistor is obtained from the 2-dimensional Gaussian doping profile. The proposed model in this paper is composed of the doping concentration of the substrate, the final surface doping concentration and the vertical junction depth of the each double-diffused region. The calculated channel length is in good agreement with the experimental results. Also, the optimum channel structure for the prevention of the channel puncthrough is obtained by the averaged doping concentration in the channel region. A correspondence between the results of device simulation of channel punchthrough and the estimations of simplified model is confirmed.

• Journal of the Korean Institute of Telematics and Electronics
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• v.26 no.11
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• pp.1666-1671
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• 1989

A novel switched-capacitor circuit for interfacing capacitive microtransducers with a digital system is developed based on the dual-slope integration. It consists of a differential integrator and a comparator. Driven by the teo phase clock, the circuit first senses the capacitance difference between the transducer and the reference capacitor in the form of charge, and accumulates it into the feedback capabitor of the integrator for a fixed period of time. The resulant accumulated charge is next extracted by the known reference charge until the integrator output voltage refurns to zero. The length of time required for the integrator output to return to zero, as measured by the number of clock cycle gated into a counter is proportional to the capacitance difference, averaged over the integration period. The whole operation is insensitive to the reference voltage and the capacitor values involved in the circuit, Thus the proposed circuit permits an accurate differental capacitance measurement. An error analysis has showh that the resolution as high as 8 bits can be expected by realizing the circuit in a monolithic MOS IC form. Besides the accuracy, it features the small device count integrable onto a small chip area. The circuit is thus particularly suitadble for the on-chip interface.