• Journal of the Korean Society of Safety
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• v.22 no.5
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• pp.27-32
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• 2007

We investigated the damage of the TTL ICs which manufactured five different technologies by artificial microwave. The artificial microwave was rated at a microwave output from 0 to 1000W, at a frequency of 2.45GHz. The microwave power was extracted into a standard rectangular waveguide(WR-340) and TTL ICs were located into the waveguide. TTL ICs were damaged two types. One is breakdown which means no physical damage is done to the system and after a reset the system is going back into function. The other is destruction which means a physical damage of the system so that the system will not recover without a hardware repair. TTL SN74S08N and SN74ALS08N devices get a breakdown and destruction occurred but TTL SN74LS08N, SN74AS08N and 74F08N devices get a destruction occurred. Also destructed TTL ICs were removed their surface and a chip conditions were analyzed by SEM. The SEM analysis of the damaged devices showed onchipwire and bondwire destruction like melting due to thermal effect. The tested results expect to be applied to the fundamental data which interprets the combination mechanism of the semiconductors from artificial microwave environment.

• Journal of the Korean Institute of Telematics and Electronics
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• v.14 no.2
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• pp.17-27
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• 1977

The special mini-computer was designed with the one-bus line systems employing the integrated circuits, and was studied by the method of easily making the compiler in 16 bits with each instruction fields. When the 160 nano seconds for a fundamental cycle were used, the optimum operating time for a TTL IC was equal to the access time for the main memory unit. As a result, the circuits were very simple, and the simulator functioned well for all the programs.

• Proceedings of the Korea Society for Simulation Conference
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• 2000.11a
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• pp.131-134
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• 2000

본 논문에서는 디지털 IC회로의 입출력과 입출력 버퍼에 대한 입출력 버퍼정보 형식 모델링을 묘사하였고 입출력 버퍼의 전기적 특성을 표현하는 방법 등을 나타냈다. 또한 본 논문에서 도출한 입출력 버퍼 모델링은 CMOS와 TTL IC를 모델링 하는데 사용할 수 있는데 CMOS와 TTL IC 그리고 ROM과 RAM 메모리에 대한 입출력 버퍼 모델을 128개 정도 만들었다. 이러한 입출력 버퍼 모델은 정확한 행동(behavioral) 모델을 구성하기 위해 그리고 고속 회로의 PCB 디자인 시뮬레이션에 사용될 것이다.

• Proceedings of the KIEE Conference
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• 2007.07a
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• pp.1512-1513
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• 2007

In this paper the influence of CMOS- and TTL-technology on the breakdown and destruction effects by artificial electromagnetic waves is determined. Different electronic devices(3 CMOS & 5 TTL) were exposed to high amplitude electromagnetic waves. CMOS ICs were occurred only destruction below the max electric field and TTL ICs were occurred breakdown and destruction below the max electric field. The SEM analysis of the destruction devices showed onchipwire and bondwire destruction like melting due to thermal effect. The test results are applied to the data which understand electromagnetic wave effects of electronic equipments.

• Proceedings of the KIEE Conference
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• 1985.07a
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• pp.242-245
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• 1985

논리회로의 합성이란 minimize된 Boolean Expression을 실재로 존재라는 TTL IC로 Implement시키는 과정을 말한다. 즉, IC pin assignment 의 과정인 것이다. 본 논문에서는 논리회로를 합성하는 expert system의 초보적인 형태를 제안하고 있다.

• Journal of the Korean Institute of Telematics and Electronics
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• v.20 no.4
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• pp.24-29
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• 1983

In this paper, a floating-point processor which satisfied the subset of the proposed IEEE standard has been designed and realized by TTL chips. This processor consists of a floating-point arithmetic unit and a control sequencer. AHPL has been used in the design of sequencer. The execution times for the arithmetic operations were measured and compared with other microprocessor. The results had shown faster operations compared to the Z-80 processor. Though this processor was built by TTL chips, it could be fabricated as a one-chip processor.

• Proceedings of the IEEK Conference
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• 2000.11b
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• pp.345-348
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• 2000

In this paper, We described the procedures to generate an input-output buffer information specification (IBIS) model in digital IC circuits. We gives the method to describe IBIS standard I/O for the characteristics of I/O buffer and to represent its electrical characteristics. The parameters of I/O structure for I/O buffer modelling are also referred, and an IBIS model for CMOS, TTL IC, ROM and RAM constructed amounts about 216. This IBIS model can be used to the simulation of signal integrity of high speed circuits in a PCB level.

• Publications of The Korean Astronomical Society
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• v.4 no.1
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• pp.63-70
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• 1989

스테핑모터를 이용하여 간단하면서도 안정성이 좋은 망원경 구동장치를 제작하였다. 스테핑모터의 제어 구동회로는 +5V의 단일전원으로도 정전류 구동에 가까운 효율을 얻을 수 있도록 설계되었다. 이 회로는 적은 수의 값싼 TTL IC 소자들로만 이루러져 있어 손쉽게 만들 수 있고 컴퓨터에 의한 제어가 쉽다는 강점이 있다.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.13 no.5
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• pp.429-436
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• 1988

This paper presents a method of designing a Bit-Serial Reed-Solomon encoder using Berlekamp's Bit-Serial Multiplier Algorithm and the implementation of the (255, 223) Bit-Serial Reed-Solomon encoder using TTL logics. It is shown from these results that this encoder require substanitially less hardware than the convenional Reed-Solomon encoders.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.14 no.1
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• pp.65-74
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• 1989

This paperr presetns the Direct Decoding Method for binary BCH codes which can find the error locattion number directly from the syndrome without calculating the error locator polynomical. Also in this paper, the triple and quadruple error correcting BCH decoder are designed using this method. As an example, the triple error correcting (63.45) BCH decoder is implemented with TTL ICs. It is shown from our results that this decoder can be implemented with relatively simple hardware.