• Journal of Information Display
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• v.9 no.2
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• pp.5-8
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• 2008

Bottom gate thin film transistors (TFTs) with microcrystalline and amorphous Si (a-Si) double active layers (DAL) were fabricated. Since the process of DAL TFTs can use that of conventional a-Si TFTs, these DAL TFT process has advantages, such as low cost, large substrate, and mass production capacity. In order to analyze the degradation characteristics in saturation region for driving TFTs of active matrix organic light emitting diode, three different dynamic stresses were applied to DAL TFTs and a-Si TFTs. The threshold voltage shift of DAL TFTs and a-Si TFTs during 10,000 second stress is 0.3V and 2V, respectively. DAL TFTs were more reliable than a-Si TFTs.

• 한국정보디스플레이학회:학술대회논문집
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• 2004.08a
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• pp.309-314
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• 2004

Static and transient behaviour of Low Temperature Poly-Si TFTs (LTPS-TFTs) and Single Grain TFTs (SG- TFTs) are compared 3-D simulation is applied here for the first time to TFTs to account for the structure and twin boundaries in SG-TFTs.

• Transactions on Electrical and Electronic Materials
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• v.15 no.6
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• pp.328-332
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• 2014

Thin film transistors (TFTs) with an amorphous silicon zinc tin oxide (a-2SZTO) channel layer have been fabricated using an RF magnetron sputtering system. The effect of the change of excitation electron on the variation of the total interfacial trap states of a-2SZTO systems was investigated depending on sputtering power, since the interfacial state could be changed by changing sputtering power. It is well known that Si can effectively reduce the generation of the oxygen vacancies. However, The a-2SZTO systems of ZTO doped with 2 wt% Si could be degraded because the Si peripheral electron belonging to a p-orbital affects the amorphous zinc tin oxide (a-ZTO) TFTs of the s-orbital overlap structure. We fabricated amorphous 2 wt% Si-doped ZnSnO (a-2SZTO) TFTs using an RF magnetron sputtering system. The a-2SZTO TFTs show an improvement of the electrical property with increasing power. The a-2SZTO TFTs fabricated at a power of 30 W showed many of the total interfacial trap states. The a-2SZTO TFTs at a power of 30 W showed poor electrical property. However, at 50 W power, the total interfacial trap states showed improvement. In addition, the improved total interfacial states affected the thermal stress of a-2SZTO TFTs. Therefore, a-2SZTO TFTs fabricated at 50 W power showed a relatively small shift of threshold voltage. Similarly, the activation energy of a-2SZTO TFTs fabricated at 50 W power exhibits a relatively large falling rate (0.0475 eV/V) with a relatively high activation energy, which means that the a-2SZTO TFTs fabricated at 50 W power has a relatively lower trap density than other power cases. As a result, the electrical characteristics of a-2SZTO TFTs fabricated at a sputtering power of 50 W are enhanced. The TFTs fabricated by rf sputter should be carefully optimized to provide better stability for a-2SZTO in terms of the sputtering power, which is closely related to the interfacial trap states.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.02a
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• pp.222-222
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• 2010

Transparent semiconductor oxide thin films have been attracting considerable attention as potential channel layers in thin film transistors (TFTs) owing to their several advantageous electrical and optical characteristics such as high mobility, high stability, and transparency. TFTs with ZnO or similar metal oxide semiconductor thin films as the active layer have already been developed for use in active matrix organic light emitting diode (AMOLED). Of late, there have been several reports on TFTs fabricated with InZnO, AlZnSnO, InGaZnO, or other metal oxide semiconductor thin films as the active channel layer. These newly developed TFTs were expected to have better electrical characteristics than ZnO TFTs. In fact, results of these investigations have shown that TFTs with the new multi-component material have excellent electrical properties. In this work, we present TFTs with inverted coplanar geometry and with a novel HfInZnO active layer co-sputtered at room temperature. These TFTs are meant for use in low voltage, battery-operated mobile and flexible devices. Overall, the TFTs showed good performance: the low sub-threshold swing was low and the $I_{on/off}$ ratio was high.

• 한국정보디스플레이학회:학술대회논문집
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• 2007.08b
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• pp.1344-1347
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• 2007

We have fabricated bottom gate TFTs with active layers of amorphous/microcrystalline Si double layers (DL). Dynamic electric stresses were applied to DL TFTs and a-Si TFTs to compare their degradation characteristics. The DL TFTs were more stable under dynamic stresses than a-Si TFTs.

• Korean Journal of Materials Research
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• v.5 no.2
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• pp.203-207
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• 1995

Polysilicon this film transistors (poly-Si TFTs) with different channel dimensions were fabricated on low-temperature crystalized amorphous silicon films and on as-deposited polysilicon films. The electrical characteristics of these TFTs were characterized and compared. The performance of the TFTs fabricated on the solid-phase crystalized amophous silicon films ws showon to be superior to that of the TFTs fabricated on the as-deposited polysilicon films. It was found that the performance of poly-Si TFTs depends strongly on the material characteristics of the polysilicon films used as the active layers, but only weakly on the channel dimensions.

• Journal of Information Display
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• v.5 no.4
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• pp.1-6
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• 2004

In this paper, we investigate on the characteristics of poly-Si TFTs reuired for the implementation of analog circuits to be integrated with System-on-Glass (SoG). Matching requirements in terms of resistor values, threshold voltage and mobility of poly-Si TFTs are derived as a function of the resolution of display system. Effective mobility of poly-Si TFTs required for the realization of source driver is analyzed for various panel sizes.

• Journal of Sensor Science and Technology
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• v.28 no.5
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• pp.329-333
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• 2019

Solution-processed oxide thin-film transistors (TFTs) have garnered great attention, owing to their many advantages, such as low-cost, large area available for fabrication, mechanical flexibility, and optical transparency. Negative bias stress (NBS)-induced instability of sol-gel IGZO TFTs is one of the biggest concerns arising in practical applications. Thus, understanding the bias stress effect on the electrical properties of sol-gel IGZO TFTs and proposing an effective recovery method for negative bias stressed TFTs is required. In this study, we investigated the variation of transfer characteristics and the corresponding electrical parameters of sol-gel IGZO TFTs caused by NBS and positive bias recovery (PBR). Furthermore, we proposed an effective PBR method for the recovery of negative bias stressed sol-gel IGZO TFTs. The threshold voltage and field-effect mobility were affected by NBS and PBR, while current on/off ratio and sub-threshold swing were not significantly affected. The transfer characteristic of negative bias stressed IGZO TFTs increased in the positive direction after applying PBR with a negative drain voltage, compared to PBR with a positive drain voltage or a drain voltage of 0 V. These results are expected to contribute to the reduction of recovery time of negative bias stressed sol-gel IGZO TFTs.

• Korean Journal of Materials Research
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• v.33 no.12
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• pp.511-516
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• 2023

Amorphous In-Ga-Zn-O (a-IGZO) thin film transistors (TFTs) with a coplanar structure were fabricated to investigate the feasibility of their potential application in large size organic light emitting diodes (OLEDs). Drain currents, used as functions of the gate voltages for the TFTs, showed the output currents had slight differences in the saturation region, just as the output currents of the etch stopper TFTs did. The maximum difference in the threshold voltages of the In-Ga-Zn-O (a-IGZO) TFTs was as small as approximately 0.57 V. After the application of a positive bias voltage stress for 50,000 s, the values of the threshold voltage of the coplanar structure TFTs were only slightly shifted, by 0.18 V, indicative of their stability. The coplanar structure TFTs were embedded in OLEDs and exhibited a maximum luminance as large as 500 nits, and their color gamut satisfied 99 % of the digital cinema initiatives, confirming their suitability for large size and high resolution OLEDs. Further, the image density of large-size OLEDs embedded with the coplanar structure TFTs was significantly enhanced compared with OLEDs embedded with conventional TFTs.

• Proceedings of the Korean Vacuum Society Conference
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• 2011.02a
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• pp.252-253
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• 2011

ZnO-based thin film transistors (TFTs) are of great interest for application in next generation flat panel displays. Most research has been based on amorphous indium-gallium-zinc-oxide (IGZO) TFTs, rather than single binary oxides, such as ZnO, due to the reproducibility, uniformity, and surface smoothness of the IGZO active channel layer. However, recently, intrinsic ZnO-TFTs have been investigated, and TFT- arrayss have been demonstrated as prototypes of flat-panel displays and electronic circuits. However, ZnO thin films have some significant problems for application as an active channel layer of TFTs; it was easy to change the electrical properties of the i-ZnO thin films under external conditions. The variable electrical properties lead to unstable TFTs device characteristics under bias stress and/or temperature. In order to obtain higher performance and more stable ZnO-based TFTs, HZO thin film was used as an active channel layer. It was expected that HZO-TFTs would have more stable electrical characteristics under gate bias stress conditions because the binding energy of Hf-O is greater than that of Zn-O. For deposition of HZO thin films, Hf would be substituted with Zn, and then Hf could be suppressed to generate oxygen vacancies. In this study, the fabrication of the oxide-based TFTs with HZO active channel layer was reported with excellent stability. Application of HZO thin films as an active channel layer improved the TFT device performance and bias stability, as compared to i-ZnO TFTs. The excellent negative bias temperature stress (NBTS) stability of the device was analyzed using the HZO and i-ZnO TFTs transfer curves acquired at a high temperature (473 K).