• Journal of Advanced Navigation Technology
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• v.14 no.2
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• pp.176-182
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• 2010

This paper proposes that an inverse class-E amplifier is used a tunable parallel resonator at output port in order to maintain a high power-added efficiency(PAE) and output power with wide frequency ranges. A tunable circuit has a constant Q factor at operating frequency ranges and because of using varactor diode, the inductor and capacitor values of resonator can be changed. Also, the inductance value for zero-current switching (ZCS) is implemented a lumped element and the capacitance value is made a distributed element for phase compensation. The inverse class E amplifier using tunable parallel resonator is obtained to deliver 25dBm output power and achieve maximum power added efficiency(PAE) of 75% at 65-120MHz frequency ranges.

• Proceedings of the KIEE Conference
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• 2000.07d
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• pp.2528-2530
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• 2000

In general, Diode makes a major role in electronic circuit. For example, switching of rectifier, cross current of switching rectifier, energy transfer of electronic element and reverse charge of capacitor, voltage insulation, energy feedback from load to power supply, and such as recovery of storaged energy. Generally, We regard power diode as ideal element, but it has a certain boundary actually, specially, We use diode for detecting circuit peak hold voltage signal. It has cut in voltage. It occurs error of measurement value namely. This error, below in region diode voltage drop (0.7v) measurement value is wholesome signal, Specially, We can not get precision data. Therefore, precision level is low between theoretical and measurement data because of error in actual circuit. Conclusionally, In this paper, We define the error concerning to the power diode characteristics which is used detecting of the minute signal, and recommend the method that minimize measurement error.

• Journal of the Korean Magnetics Society
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• v.12 no.3
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• pp.109-116
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• 2002

We designed the flyback planar transformer, which had 8 W capacity, with 70 V input voltage and 8.2 V output voltage for the establishment of design method and the confirmation of application possibility. The numerical value of inductance measured under the switching frequency of 120 kHz was 1650 $\mu$H, which was the inductance efficiency of'85∼87% against theoretical value. The A.C. resistance of primary and secondary coil was 4.2 Ω and 0.25 Ω respectively, On the other hand, the quality factor for each wound numbers showed quite a high value of 158 and 75 respectively. And the Coupling Factor was 0.96∼0.97 under 120 kHz switching frequency. The inductance rapidly increased as the thickness of the core plane increased until it became 1.4 mm but under the thickness more than 1.4 mm, there was no substantial change. Therefore, the critical value of the plane thickness of core was 1.4 mm. And the shape of the output wave of the planar transformer at 70V input voltage was a stable square wave.

• IEIE Transactions on Smart Processing and Computing
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• v.4 no.3
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• pp.183-188
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• 2015

A 10-bit 10MS/s low power consumption successive approximation register (SAR) analog-to-digital converter (ADC) using a straightforward capacitive digital-to-analog converter (DAC) is presented in this paper. In the proposed capacitive DAC, switching is always straightforward, and its value is half of the peak-to-peak voltage in each step. Also the most significant bit (MSB) is decided without any switching power consumption. The application of the straightforward switching causes lower power consumption in the structure. The input is sampled at the bottom plate of the capacitor digital-to-analog converter (CDAC) as it provides better linearity and a higher effective number of bits. The comparator applies adaptive power control, which reduces the overall power consumption. The differential prototype SAR ADC was implemented with $0.18{\mu}m$ complementary metal-oxide semiconductor (CMOS) technology and achieves an effective number of bits (ENOB) of 9.49 at a sampling frequency of 10MS/s. The structure consumes 0.522mW from a 1.8V supply. Signal to noise-plus-distortion ratio (SNDR) and spurious free dynamic range (SFDR) are 59.5 dB and 67.1 dB and the figure of merit (FOM) is 95 fJ/conversion-step.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.18 no.8
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• pp.720-723
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• 2005

We studied the quantitativity of the image sticking which is occured by the resicual DC in the fringe-electric field switching (FFS) mode. Actually, in the FFS mode driven by the strong fringe electric field, the asymmetric residual DC was formed in the bottom substrate. It made the impurity ion stick to the alignment layer such as polyimde layer. Thus, the differnece of the luminance existes after the stress check pattern is applied to the panel so that we can see the image sticking. This image sticking decreases as the residual DC value between specific patterns decreases. Therefore, it is necessary to control the residual DC for the FFS mode with the high image quality. It is possible to eliminate the image stiking when the extra pixel voltage is applied through the circuit tunning for reducing the difference of residual DC accroding to the panel position.

• Korean Journal of Materials Research
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• v.25 no.9
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• pp.429-434
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• 2015

Resistance switching memory cells were fabricated using atomically dispersed Pt-$SiO_2$ thin film prepared via RF co-sputtering. The memory cell can switch between a low-resistance-state and a high-resistance-state reversibly and reproducibly through applying alternate voltage polarities. Percolated conducting paths are the origin of the low-resistance-state, while trapping electrons in the negative U-center in the Pt-$SiO_2$ interface cause the high-resistance-state. Intermediate resistance-states are obtained through controlling the compliance current, which can be applied to multi-level operation for high memory density. It is found that the resistance value is related to the capacitance of the memory cell: a 265-fold increase in resistance induces a 2.68-fold increase in capacitance. The exponential growth model of the conducting paths can explain the quantitative relationship of resistance-capacitance. The model states that the conducting path generated in the early stage requires a larger area than that generated in the last stage, which results in a larger decrease in the capacitance.

• Journal of Institute of Control, Robotics and Systems
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• v.8 no.4
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• pp.319-326
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• 2002

In switched reluctance motor(SRM) drive, it is important to synchronize the stator phase excitation with the rotor position; therefore, the information about rotor position is essential. Generally, optical encoders or resolvers are used to provide the information. However, these sensors are expensive and are not suitable for high-speed operation. The accuracy of the switching angles is dependent upon the resolution of the encoder and the sampling period of the microprocessor. In the high-speed region, switching angles are fluctuated back and forth out of the preset value, which is caused by the sampling period of the microprocessor. In this paper, a low cost linear encoder suitable far the practical and stable SRM drive is proposed and also the control algorithm to generate the switching signals using a simple digital logic is presented. The validity of the proposed linear encoder with a proper logic controller is verified through the experiments.

• Journal of Power Electronics
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• v.18 no.4
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• pp.975-984
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• 2018

This work presents a high efficiency phase shifted full bridge (PSFB) DC-DC converter for use in the second stage of a battery charger for neighborhood electrical vehicle (EV) applications. In the design of the converter, Lithium-ion battery cells are preferred due to their high voltage and current rates, which provide a high power density. This requires wide range output voltage regulation for PSFB converter operation. In addition, the battery charger works with a light load when the battery charge voltage reaches its maximum value. The soft switching of the PSFB converter depends on the dead time optimization and load condition. As a result, the converter has to work with soft switching at a wide range output voltage and under light conditions to reach high efficiency. The operation principles of the PSFB converter for the continuous current mode (CCM) and the discontinuous current mode (DCM) are defined. The performance of the PSFB converter is analyzed in detail based on wide range output voltage and load conditions in terms of high efficiency. In order to validate performance analysis, a prototype is built with 42-54 V / 15 A output values at a 200 kHz switching frequency. The measured maximum efficiency values are obtained as 94.4% and 76.6% at full and at 2% load conditions, respectively.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2006.11a
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• pp.47-48
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• 2006

Carbon nanotubes (CNTs)-doped homogeneously aligned nematic liquid crystal (LC) cells driven by in-plane field were fabricated and their electro-optic characteristics were investigated. Effective cell retardation values in an absence of an electric field between doped and undoped LC were the same each other. In the presence of an electric field, however, measured effective cell retardation value was smaller in the CNT-doped cell than in the undoped cell so that the transmittance was slightly smaller in the CNT-doped cell than in the undoped cell. In addition, the CNT-doped cell exhibited slight increase in driving voltage and decrease in response time compared to the undoped cell. The CNT effects on electro-optic characteristics of the cell were discussed.

• Journal of Advanced Marine Engineering and Technology
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• v.31 no.8
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• pp.975-982
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• 2007

The single-phase switched reluctance motor(SRM) drive requires DC source which is generally supplied through a rectifier connected with a commercial source. The rectifier is consist of a diode full bridge and a filter circuit. Usually the filter circuit uses capacitor with large value capacitance to reduce ripple component of DC power. Although the peak torque ripple of SRM is small, the short charge and discharge current of the filter capacitor draws the low power factor and system efficiency. A modified single phase SRM drive system is presented in this paper, which includes drive circuit realizing reduction of torque ripple and improvement of power factor. In the proposed drive circuit, one switching part and diode which can separate the output of AC/DC rectifier from the filter capacitor is added. Also, a upper switch of drive circuit is exchanged a diode in order to reduce power switching device. Therefore the number of power switch device is not changed, two diodes are only added in the SRM drive. To verify the proposed system, some simulation and experimental results are presented.