• Title/Summary/Keyword: Switching process

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Complementary Dual-Path Charge Pump with High Pumping Efficiency in Standard CMOS Logic Technology (상보형 전하이동 경로를 갖는 표준 CMOS 로직 공정용 고효율 전하펌프 회로)

  • Lee, Jung-Chan;Chung, Yeon-Bae
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.46 no.12
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    • pp.80-86
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    • 2009
  • In this paper, we present a new charge pump circuit feasible for the implementation with standard twin-well CMOS process technology. The proposed charge pump employs PMOS-switching dual charge-transfer paths and a simple two-phase clock. Since charge transfer switches are fully turned on during each half of clock cycle, they transfer charges completely from the present stage to the next stage without suffering threshold voltage drop. During one clock cycle, the pump transfers charges twice through two pumping paths which are operating alternately. The performance comparison by simulations and measurements demonstrates that the proposed charge pump exhibits the higher output voltage, the larger output current and a better power efficiency over the traditional twin-well charge pumps.

Design of High Voltage Gate Driver IC with Minimum Change and Variable Characteristic of Dead Time (최소 변동 및 가변 데드 타임을 갖는 고전압 구동 IC 설계)

  • Mun, Kyeong-Su;Kim, Hyoung-Woo;Kim, Ki-Hyun;Seo, Kil-Soo;Cho, Hyo-Mun;Cho, Sang-Bock
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.46 no.12
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    • pp.58-65
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    • 2009
  • In this paper, we designed high voltage gate drive IC including dead time circuit in which capacitors controlled rising time and falling time, and schimitt-triggers controlled switching voltage. Designed High voltage gate drive IC improves an efficiency of half-bridge converter by decreasing dead time variation against temperature and has variable dead time by the capacitor value. and its power dissipation, which is generated on high side part level shifter, has decreased 52 percent by short pulse generation circuit, and UVLO circuit is designed to prevent false-operation. We simulated by using Spectre of Cadence to verify the proposed circuit and fabricated in a 1.0um process.

Post Annealing Treatment Introducing an Isotropy Magnetorsistive Property of Giant Magnetoresistance-Spin Valve Film for Bio-sensor (바이오센서용 거대자기저항-스핀밸브 박막이 등방성 자기저항 특성을 갖게 하는 후열처리 조건 연구)

  • Khajidmaa, P.;Park, Kwang-Jun;Lee, Sang-Suk
    • Journal of the Korean Magnetics Society
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    • v.23 no.3
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    • pp.98-103
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    • 2013
  • The magnetic easy axis of the ferromagnetic layer for the dual-type GMR-SV (giant magnetoresistance-spin valve) having NiFe/Cu/NiFe/IrMn/NiFe/Cu/NiFe multuilayer structure controlled by the post annealing treatment. The magnetoresistive curves of a dual-type IrMn based GMR-SV depending on the direction of the magnetic easy axis of the free and the pinned layers are measured by the different angles for the applied fields. By investigating the switching process of magnetization for an arbitrary measuring direction, the optimum annealing temperature having a steady and isotropy magnetic sensitivity of 2.0 %/Oe was $105^{\circ}C$. This result suggests that the in-plane orthogonal magnetization for the dual-type GMR-SV film can be used by a high sensitive biosensor.

The Effects of Dissatisfaction on Consumer Behavioral Response in Smartphone Application Service (스마트폰 어플리케이션 서비스의 불만족이 고객 행동에 미치는 영향에 관한 연구)

  • Kim, Yong-Hee;Choi, Jeong-Il;Jin, Yeong-Ho;Lee, Dong-Won
    • Journal of Korean Society for Quality Management
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    • v.40 no.3
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    • pp.359-371
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    • 2012
  • Purpose: Due to the explosive growth and widespread use of smartphones, new business opportunities are emerging. Despite the importance of creating customer value in using smartphone applications, past studies on have mainly focused on functions or factors and specifications that influence users to use the device. Methods: This study is intended to identify how customer dissatisfaction from the use of smartphone application services affects customer sentiment and behavior. The research model is tested via a survey of 290 smartphone application users. Results: The result of this empirical study indicates that customer dissatisfaction significantly affects the user's disappointment and regret in using a service, which are subordinate values of customer emotion. The user's anger is positively associated with 'Negative word of mouth' and 'Complaint', which are subordinate values of customer behavior, but not with an intention to switch to another service. 'Regret' and 'Disappointment' are positively associated with 'Negative word of mouth' and 'Switching intention', but not with 'Making direct complaints'. Finally, customer's negative sentiments are a significant intermediary in the relationship between customer dissatisfaction and behavioral response. Conclusion: Finally, the study offers a more systematic understanding on the phasal response process of customer dissatisfaction in relation to the provision of smartphone application services.

A Reconfigurable Spatial Moving Average Filter in Sampler-Based Discrete-Time Receiver (샘플러 기반의 수신기를 위한 재구성 가능한 이산시간 공간상 이동평균 필터)

  • Cho, Yong-Ho;Shin, Soo-Hwan;Kweon, Soon-Jae;Yoo, Hyung-Joun
    • Journal of the Institute of Electronics and Information Engineers
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    • v.49 no.10
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    • pp.169-177
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    • 2012
  • A non-decimation second-order spatial moving average (SMA) discrete-time (DT) filter is proposed with reconfigurable null frequencies. The filter coefficients are changeable, and it can be controlled by switching sampling capacitors. So, interferers can be rejected effectively by flexible nulls. Since it operates without decimation, it does not change the sample rate and aliasing problem can be avoided. The filter is designed with variable weight of coefficients as $1:{\alpha}:1$ where ${\alpha}$ varies from 1 to 2. This corresponds to the change of null frequencies within the range of fs/3~fs/2 and fs/2~2fs/3. The proposed filter is implemented in the TSMC 0.18-${\mu}m$ CMOS process. Simulation shows that null frequencies are changeable in the range of 0.38~0.49fs and 0.51~0.62fs.

A Study on the Stability of Ultra-Thin Film Mixed with Stearic Acid and Phospholipid (스테아르산과 인지질 혼합물의 농도변화에 대한 유기초박막의 안정성에 관한 연구)

  • Park, Keun-Ho
    • Journal of the Korean Applied Science and Technology
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    • v.32 no.4
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    • pp.789-794
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    • 2015
  • In this study, we investigated the stability with respect to the Langmuir-Blodgett(LB) monolayer films of stearic acid and phospholipid(L-${\alpha}$-dimyristoylphosphatidyl choline, DMPC) mixture. LB films of stearic acid and DMPC monolayer were deposited by the LB method on the indium tin oxide(ITO) glass. The electrochemical properties measured by cyclic voltammetry with three-electrode system in $0.05N\;NaClO_4$ solution, -0.3 V initial, 1650 mV switching potential and -1350 mV final potential. As a result, monolayer LB films of stearic acid and phospholipid mixture was appeared on irreversible process caused by the oxidation current from the cyclic voltammogram. Diffusion coefficient (D) of stearic acid and DMPC mixture(molar ratio 1:1, 1:2, 1:3) was calculated $1.4{\times}10^{-3}$, $1.7{\times}10^{-3}$ and $1.6{\times}10^{-3}(cm^2/s)$ in $0.05N\;NaClO_4$ solution, respectively.

Embodiment of PWM converter by using the VHDL (VHDL을 이용한 PWM 컨버터의 구현)

  • Baek, Kong-Hyun;Joo, Hyung-Jun;Lee, Hyo-Sung;Lim, Yong-Kon;Lee, Heung-Ho
    • Proceedings of the KIEE Conference
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    • 2002.11d
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    • pp.197-199
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    • 2002
  • The invention of VHDL(Very High Speed Integrated Circuit Hardware Description Language), Technical language of Hardware, is a kind of turning point in digital circuit designing, which is being more and more complicated and integrated. Because of its excellency in expression ability of hardware, VHDL is not only used in designing Hardware but also in simulation for verification, and in exchange and conservation, composition of the data of designs, and in many other ways. Especially, It is very important that VHDL is a Technical language of Hardware standardized by IEEE, intenational body with an authority. The biggest problem in modern circuit designing can be pointed out in two way. One is a problem how to process the rapidly being complicated circuit complexity. The other is minimizing the period of designing and manufacturing to survive in a cutthroat competition. To promote the use of VHDL, more than a simple use of simulation by VHDL, it is requested to use VHDL in composing logical circuit with chip manufacturing. And, by developing the quality of designing technique, it can contribute for development in domestic industry related to ASIC designing. In this paper in designing SMPS(Switching mode power supply), programming PWM by VHDL, it can print static voltage by the variable load, connect computer to chip with byteblaster, and download in Max(EPM7064SLCS4 - 5)chip of ALTER. To achieve this, it is supposed to use VHDL in modeling, simulating, compositing logic and product of the FPGA chip. Despite its limit in size and operating speed caused by the specific property of FPGA chip, it can be said that this method should be introduced more aggressively because of its prompt realization after designing.

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Time Slot Assignment Algorithm with Graph Coloring (그래프 채색에 의한 타임 슬롯 할당 알고리즘)

  • Kwon, Bo-Seob
    • The Journal of the Korea Contents Association
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    • v.8 no.5
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    • pp.52-60
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    • 2008
  • A simple Time Division Multiplex(TDM) switching system which has been widely in satellite networks provides any size of bandwidth for a number of low bandwidth subscribers by allocating proper number of time slots in a frame. In this paper, we propose a new approach based on graph coloring model for efficient time slot assignment algorithm in contrast to network flow model in previous works. When the frame length of an initial matrix of time slot requests is 2's power, this matrix is divided into two matrices of time slot requests using binary divide and conquer method based on the graph coloring model. This process is continued until resulting matrices of time slot requests are of length one. While the most efficient algorithm proposed in the literature has time complexity of $O(N^{4.5})$, the time complexity of the proposed algorithm is $O(NLlog_2L)$, where N is the number of input/output links and L is the number of time slot alloted to each link in the frame.

Change of Biomagnetic Field around Acupoints of Kigong Master during Qi radiation (발공중인 기공자 경혈주위의 미소자기장 관찰)

  • Jang Kyeong Seon;Choi Chan Hun;Jeong Chan Won;Lee Yoon Ho;Yoon Yoo Sik;So Cheal Ho
    • Journal of Physiology & Pathology in Korean Medicine
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    • v.16 no.3
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    • pp.537-541
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    • 2002
  • When a Kigong master concentrates the Qi at Yintang, Laogong(P8), Qihai(CV6) meridian points during Kigong state, the change of magnetic field around acupoints Yintang, Laogong points has been measured using DROS-SQUID apparatus. After smoothing process of the continuously measured magnetic signal around acupoints for a few minutes, we could observe that a series of peaks, magnitude of 1~2 pT and period of 5 sec, appeared and find that these peaks were clearly changed as if switch on and off according to Qi concentration state. Before Qi radiation, a series of the peaks measured on Yintang or Laogong point of a Kigong master shows one of either SW-ON state or SW-OFF state as initial state. During Qi radiation, its state becomes inverse of initial state. After Qi radiation, it returns to the initial state for some cases (called P type ; push button switch type) or it remains inversion state for other cases (called T type; toggle switch type). From the data of peaks measured at different position from the Qi concentration acupoint, we found that the Qi radiation on an acupoint makes the switching effect even not at the acupoint that Qi is concentrated but at the other acupoints that Qi is not concentrated.

Atomic layer deposition of In-Sb-Te Thin Films for PRAM Application

  • Lee, Eui-Bok;Ju, Byeong-Kwon;Kim, Yong-Tae
    • Proceedings of the Korean Vacuum Society Conference
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    • 2011.02a
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    • pp.132-132
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    • 2011
  • For the programming volume of PRAM, Ge2Sb2Te5(GST) thin films have been dominantly used and prepared by physical vapor deposition (PVD), chemical vapor deposition (CVD), atomic layer deposition (ALD). Among these methods, ALD is particularly considered as the most promising technique for the integration of PRAM because the ALD offers a superior conformality to PVD and CVD methods and a digital thickness control precisely to the atomic level since the film is deposited one atomic layer at a time. Meanwhile, although the IST has been already known as an optical data storage material, recently, it is known that the IST benefits multistate switching behavior, meaning that the IST-PRAM can be used for mutli-level coding, which is quite different and unique performance compared with the GST-PRAM. Therefore, it is necessary to investigate a possibility of the IST materials for the application of PRAM. So far there are many attempts to deposit the IST with MOCVD and PVD. However, it has not been reported that the IST can be deposited with the ALD method since the ALD reaction mechanism of metal organic precursors and the deposition parameters related with the ALD window are rarely known. Therefore, the main aim of this work is to demonstrate the ALD process for IST films with various precursors and the conformal filling of a nano size programming volume structure with the ALD?IST film for the integration. InSbTe (IST) thin films were deposited by ALD method with different precursors and deposition parameters and demonstrated conformal filling of the nano size programmable volume of cell structure for the integration of phase change random access memory (PRAM). The deposition rate and incubation time are 1.98 A/cycle and 25 cycle, respectively. The complete filling of nano size volume will be useful to fabricate the bottom contact type PRAM.

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