• The Research Journal of the Costume Culture
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• v.27 no.5
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• pp.512-523
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• 2019

Contemporary University students are considered the Z generation who were born after 1995. They are more tech savvy than millennials. To target the generation, traditional class management platforms have evolved to smart LMS that is more customized and accessible for smart devices. Global level information search and collaboration can also be implemented using such smart LMS. However, switching from one LMS to another LMS requires great effort from teachers and support from staffs. This study measured the learners' perception of the system when they were exposed to a new smart-LMS. Blackboard Learn Ultra was used for 15 weeks and at the end of the semester, a questionnaire was administered to the students of these classes. Results indicated that experience with previous LMS discouraged students from adopting Blackboard Learn. Result of TAM modeling indicated that perceived usefulness, compared to perceived ease of use and attitude, was an effective aspect to bring positive acceptance of the system. A qualitative approach and network analysis were also conducted based on students' responses. Both positive and negative responses were detected. Inconvenience due to mechanical aspects was mentioned. Dissatisfaction compared to previous local LMS use was also mentioned. Mobile application and communication effectiveness were positive aspects. Revised course development and promoting how useful the system may help enhance the acceptance of the new system.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.24 no.8
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• pp.1037-1043
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• 2020

This paper presents a new Physical Unclonable Function (PUF) security chip based on a low-cost, small-area, and low-power semiconductor process for IoT devices. The proposed security circuit has multiple challenge-to-response pairs (CRP) by adding the switching circuit to the cross-coupled path between two inverters of the SRAM structure and applying the challenge input. As a result, the proposed structure has multiple CRPs while maintaining the advantages of fast operating speed and small area per bit of the conventional SRAM based PUF security chip. In order to verify the performance, the proposed switched SRAM based PUF security chip with a core area of 0.095㎟ was implemented in a 180nm CMOS process. The measurement results of the implemented PUF show 4096-bit number of CRPs, intra-chip Hamming Distance (HD) of 0, and inter-chip HD of 0.4052.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.18 no.2
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• pp.65-73
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• 2008

Security layer of the Cdma2000 1x EV-DO is currently completing standard (C.S0024-A v2.0). Accordingly, a hardware security devices, that allows to implementation requirement of the security layer described in standard document, is required to apply security function about data transferred between AT and AN of then Cdma2000 1x EV-DO environment. This paper represents design of hardware device providing EV-DO security with simulation of the security layer protocol via the FPGA platform. The SHA-1 hash algorithm for certification and service of packet data, and the AES, SEED, ARIA algorithms for data encryption are equip in this device. And paper represents implementation of hardware that applies optionally certification and encryption function after executing key-switch using key-switching algorithm.

• Journal of Advanced Navigation Technology
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• v.26 no.1
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• pp.35-45
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• 2022

In this paper, we modeled the devices used easily in PV system circuits. In addition, for full operation of the photovoltaic system, a complete operation system for the DC-DC buck-boost converter and the MPPT control system was modeled and simulated to confirm good operation. we were constructed an actual system with the same conditions in the simulation and experimented. The purpose is to confirm the stable power supply through the load leveling by presenting the PCS considering ESS of photovoltaic power generation. we will do study to apply hybrid capacitors that have high energy density to the same size compared to the EDLC to DVR. As a result, we proposed a single-phase 3 kW grid-connected solar power converter.

• The Transactions of the Korean Institute of Power Electronics
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• v.27 no.1
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• pp.26-32
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• 2022

This paper proposes a power system that includes a 120k W fuel cell DC-DC converter (FDC) and 30 kW bidirectional DC-DC converter (BHDC) for a 150 kW fuel-cell vehicle. With a high DC link voltage of 800 V, the efficiency and power density of the power electronic components are improved. Through the modular design of FDC and BHDC, electric components are shared, resulting in reduced mass production costs. The switching frequency of 30 kHz of full SiC devices and optimal design of coupled inductor reduce the volume, achieving a power density of 8.3 kW/L. Furthermore, a synergetic operation strategy using variable limiter control of FDC and BHDC was proposed to efficiently operate the fuel cell vehicle considering the fuel cell stack efficiency according to the load. Finally, the performance of the prototype was verified by Highway Fuel Economy Driving Schedule testing, EMI test, and the linked operation between FDC and BHDC. The full load efficiencies of the FDC and BHDC prototypes are 98.47% and 98.74%, respectively.

• Journal of Software Assessment and Valuation
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• v.16 no.2
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• pp.109-115
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• 2020

In this paper, the problem that occurs when negative voltage is generated using an inexpensive buck device in an IT device that is supplied with a single power by an adapter or battery is analyzed. For the cause analysis, the principle of operation of the buck device and the principle of the inverter circuit were examined, and the circuit characteristics of the inverter circuit were analyzed using the buck device. As a result of the analysis, it was confirmed that the inverter circuit using the buck device initially needs a large starting current, and in particular, in the case of a current capacity that is less than the starting current in the circuit that supplies power, it was confirmed that it could fall into a state similar to the latch-up phenomenon. In order to confirm the analysis result, an experimental circuit was constructed and the input current was checked. If the supply current is sufficient, it is confirmed that over-current flows and starts. If the supply current is insufficient, the circuit cannot start and a latch-up phenomenon occurs.

• The Journal of the Korea institute of electronic communication sciences
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• v.18 no.6
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• pp.1081-1086
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• 2023

The rapid growth and increasing complexity of modern networks have highlighted the limitations of traditional network architectures. The emergence of SDN (Software-Defined Network) in response to these challenges has changed the existing network environment. The SDN separates the control unit and the data unit, and adjusts the network operation using a centralized controller. However, this structure has also recently caused a huge amount of traffic due to the rapid spread of numerous Internet of Things (IoT) devices, which has not only slowed the transmission speed of the network but also made it difficult to ensure quality of service (QoS). Therefore, this paper proposes a method of load distribution by switching the IP and any server (processor) from the existing data processing scheduling technique, RR (Round-Robin), to mapping when a large amount of data flows in from a specific IP, that is, server overload and data loss.

• The Korean Journal of Rheology
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• v.11 no.2
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• pp.82-90
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• 1999

Electrorheological(ER) fluid is a material that shows the dramatic change of rheological properties under an electric field and responds reversibly in a few milliseconds. ER fluid's response to an electric field along with its fast switching capability allows ER devices to be precisely controlled. The real application with ER fluid, however, has many limitations to be overcome; temperature fluctuation, moisture, dust, aggregation, precipitation, and low yield stress, for example. The magnitude and the characteristics of yield stress of ER fluid plays an important role in practical applications. In this research, a dynamic simulation on the squeezing flow of the ER fluid was carried out. Numerical simulation on isolated chains was performed to find out the effect of hydrodynamic and electrostatic force depending on the chain location, the squeezing rate, and the chain structure. Suspension model that is composed of a large number of particles was also investigated. The increase of normal stresses as well as the existence of a yield stress at an earlier stage could be observed, and the effective control of the normal stresses could be achieved at an optimal condition of the hydrodynamic force and the electrostatic force.

• The KIPS Transactions:PartB
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• v.12B no.6 s.102
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• pp.679-684
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• 2005

There are a few representative wireless network access technologies used widely. WWAN is celluar based telecommunication networks supporting high mobility, WLAN ensures high data rate within hotspot coverage, and WDMB support both data and broadcasting services correspondingly. However, these technologies include some limitations especially on the mobility, data rate, transmission direction, and so on. In order to overvome these limitations, there are various studies have been proposed in terms of 'Vortical Handoff' that offers seamless connectivity by switching active connection to the appropriate interface which installed in the mobile devices. In this paper, we propose the interface selection algorithm and network architecture to maximize the life time of entire system by minimizing the unnecessary energy consumption of another interfaces such as WLAN, WDMB that are taken in the user equipment. In addition, by using the results of analyzing multiple types of traffic and managing user buffer as a metric for vertical handoff, we show that the energy efficiency of our scheme is $75\%$ and $34\%$ than typical WLAN for WDMB and WLAN preferred schemes, correspondingly.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.15 no.4
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• pp.913-920
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• 2011

In this paper, a logic process based 1-kbit EEPROM IP for RFID tag chips of 900MHz is designed. The cell array of the designed 1-kbit EEPROM IP is arranged in a form of four blocks of 16 rows x 16 columns, that is in a two-dimensional arrangement of one-word EEPROM phantom cells. We can reduce the IP size by making four memory blocks share CG (control gate) and TG (tunnel gate) driver circuits. We propose a TG switch circuit to supply respective TG bias voltages according to operational modes and to keep voltages between devices within 5.5V in terms of reliability in order to share the TG driver circuit. Also, we can reduce the power consumption in the read mode by using a partial activation method to activate just one of four memory blocks. Furthermore, we can reduce the access time by making BL (bit line) switching times faster in the read mode from reduced number of cells connected to each column. We design and compare two 1-kbit EEPROM IPs, two blocks of 32 rows ${\times}$ 16 columns and four blocks of 16 rows ${\times}$ 16 columns, which use Tower's $0.18{\mu}m$ CMOS process. The four-block IP is smaller by 11.9% in the layout size and by 51% in the power consumption in the read mode than the two-block counterpart.