• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.21 no.6
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• pp.33-39
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• 2007

In this paper, novel topology for fast response of various loads is proposed. The windup phenomenon appears and results in performance degradation when the PI controller output is saturated. A new anti-windup PI controller is proposed to improve the control performance of variable speed motor drives, and it is experimentally applied to the speed control of a hysteresis current-controlled SRM driven by an asymmetry bridge converter. The experimental results show that the speed response has much improved performance, such as small overshoot and fast settling time, over the conventional PI control.

• Journal of Power Electronics
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• v.18 no.1
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• pp.81-91
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• 2018

This paper proposes a double line voltage synthesis (DLVS) strategy for three-to-five phase direct matrix converters. In the proposed strategy, the input and expected output voltages are divided into 6 segments and 10 segments, respectively. In addition, in order to obtain the maximum voltage transfer ratio (VTR), the input line voltages and "source key" should be selected reasonably according to different combinations of input and output segments. Then, the corresponding duty ratios are calculated to determine the switch sequences in different segment combinations. The output voltages and currents are still sinusoidal and symmetrical with little lower order harmonics under unbalanced or distorted input voltages by using this strategy. In addition, the common mode voltage (CMV) can be suppressed by rearranging some of the switching states. This strategy is analyzed and studied by a simulation model established in MATLAB/Simulink and an experimental platform, which is controlled by a DSP and FPGA. Simulation and experimental results verify the feasibility and validity of the proposed DLVS strategy.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.40 no.3
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• pp.152-162
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• 2003

In this paper, Binary to Quaternary Converter(BQC), Quaternary to Binary Converter(QBC) and Quaternary inverter circuit, which is the basic logic gate, have been proposed based on voltage mode. The BQC converts the two bit input binary signals to one digit quaternary output signal. The QBC converts the one digit quaternary input signal to two bit binary output signals. And two circuits consist of Down-literal circuit(DLC) and combinational logic block(CLC). In the implementation of quaternary inverter circuit, DLC is used for reference voltage generation and control signal, only switch part is implemented with conventional MOS transistors. The proposed circuits are simulated in 0.35 ${\mu}{\textrm}{m}$ N-well doubly-poly four-metal CMOS technology with a single +3V supply voltage. Simulation results of these circuit show 250MHz sampling rate, 0.6mW power consumption and maintain output voltage level in 0.1V.

• KIEE International Transaction on Electrical Machinery and Energy Conversion Systems
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• v.3B no.3
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• pp.147-154
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• 2003

This paper presents a high-frequency boost type ZVS-PWM chopper-fed DC-DC power converter with a single active auxiliary edge-resonant snubber at the load stage which can be designed for power conditioners such as solar photovoltaic generation, fuel cell generation, battery and super capacitor energy storages. Its principle operation in steady-state is described in addition to a prototype setup. The experimental results of boost type ZVS-PWM chopper proposed here, are evaluated and verified with a practical design model in terms of its switching voltage and current waveforms, the switching v-i trajectory and the temperature performance of IGBT module, the actual power conversion efficiency, and the EMI of radiated and conducted emissions, and then discussed and compared with the hard switching scheme from an experimental point of view. Finally, this paper proposes a practical method to suppress parasitic oscillation due to the active auxiliary resonant switch at ZCS turn-off mode transition with the aid of an additional lossless clamping diode loop, and can be reduced the EMI conducted emission.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.17 no.6
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• pp.239-245
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• 2016

In this study, a 12 V PWM boost converter was designed with the optimal values of the external components of the power stage was well as the compensation stage for smart electronic applications powered by a battery device. The 12 V boost PWM converter consisted of several passive elements, such as a resistor, inductor and capacitor with a diode, power MOS switch and control IC chip for the control PWM signal. The devices of the power stage and compensation stage were designed to maintain stable operation under a range of load conditions as well as achieving the highest power efficiency. The results of this study were first verified by a simulation in SPICE from calculations of the values of major external elements comprising the converter. The design was also implemented on the prototype PCBboard using commercial IC LM3481 from Texas Instruments, which has a nominal output voltage of 12 V. The output voltage, ripple voltage, and load regulation with the line regulation were measured using a digital oscilloscope, DMM tester, and DC power supply. By configuring the converter under the same conditions as in the circuit simulation, the experimental results matched the simulation results.

• Journal of Power Electronics
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• v.17 no.6
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• pp.1535-1544
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• 2017

Advances in FPGA technology have enabled fast real-time simulation of power converters, filters and loads. FPGA based HIL (Hardware-In-the-Loop) simulators have revolutionized control hardware and software development for power electronics. Common time step sizes in the order of 100ns are sufficient for simulating switching frequency current and voltage ripples. In order to keep the time step as small as possible, ideal switching function models are often used to simulate the phase legs. This often produces inferior results when simulating the discontinuous conduction mode (DCM) and disabled operational states. Therefore, the corresponding measurement and protection units cannot be tested properly. This paper describes a new solution for this problem utilizing a discrete-time PI controller. The PI controller simulates the proper DC and low frequency AC components of the phase leg voltage during disabled operation. It also retains the advantage of fast real-time execution of switch-based models when an accurate simulation of high frequency junction capacitor oscillations is not necessary.

• JSTS:Journal of Semiconductor Technology and Science
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• v.16 no.6
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• pp.760-770
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• 2016

A 12-bit 750 kS/s Dual-Sampling Successive Approximation Register Analog-to-Digital Converter (SAR ADC) technique with reduced Capacitive DAC (CDAC) is presented in this paper. By adopting the Adaptive Power Control (APC) technique for the two-stage latched type comparator and using bootstrap switch, power consumption can be reduced and overall system efficiency can be optimized. Bootstrapped switches also are used to enhance the sampling linearity at a high input frequency. The proposed SAR ADC reduces the average switching energy compared with conventional SAR ADC by adopting reduced the Most Significant Bit (MSB) cycling step with Dual-Sampling of the analog signal. This technique holds the signal at both comparator input asymmetrically in sample mode. Therefore, the MSB can be calculated without consuming any switching energy. The prototype SAR ADC was implemented in $0.18-{\mu}m$ CMOS technology and occupies $0.728mm^2$. The measurement results show the proposed ADC achieves an Effective Number-of-Bits (ENOB) of 10.73 at a sampling frequency of 750 kS/s and clock frequency of 25 MHz. It consumes only 0.13 mW from a 5.0-V supply and achieves the INL and DNL of +2.78/-2.45 LSB and +0.36/-0.73 LSB respectively, SINAD of 66.35 dB, and a Figures-of-Merit (FoM) of a 102 fJ/conversion-step.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.19 no.3
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• pp.179-184
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• 2019

In many countries, such as developing countries where electricity is scarce, small wind turbines in the form of Off Grid are an effective solution to solve power supply problems. In some countries, the expansion of power systems and the decline of electricity-intensive areas have led to the use of small wind power in urban road lighting, mobile communications base stations, aquaculture and seawater desalination. With this change, the size of the small wind power industry is expected to have greater potential than large-scale wind power. In the case of small wind power generators, the generator is controlled at a variable speed, and the voltage and current generated by the generator have many harmonic components. To solve this problem, the AC to DC converter to be studied in this paper is a three-phase step-up type converter with a single switch. The inductor current is controlled in discontinuous mode, and has a characteristic of having a unit power factor by eliminating the harmonic of the input current. The proposed converter is composed of LCL filter and three phase rectification boost converter at the input stage and a single phase full bridge for grid connection. It is a control system with energy storage system(ESS) that the system stabilization can be pursued against the electric power.

• The Transactions of the Korean Institute of Power Electronics
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• v.4 no.5
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• pp.423-432
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• 1999

This paper proposes a 12­pulse diode rectifier system with low kVA components suitable for powering switch mode power supplies or ac/dc converter applications. The proposed 12-pulse system employs a polyphase transformer, a zero sequence blocking transformer (ZSBT) in the dc link, and an interphase transformer. Results produce near equal leakage inductance in series with each diode rectifier bridge ensuring equal current sharing and performance improvements, The utility input currents and the voltage across the ZSBT are analyzed the kVA rating of each component in the proposed system is computed. The 5th , 7th , 17th and 19th harmonics are eliminated in the input line currents resulting in clean input power. The dc link voltage magnitude generated by the proposed rectifier system is nearly identical to a conventional to a conventional 6-pulse system. The proposed system is suitable to retrofit applications as well as in new PWM drive systems. Simulation and experimental results from a 208V , 10kVA system are shown.

• Proceedings of the KIPE Conference
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• 2011.07a
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• pp.179-180
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• 2011

This paper focuses on the Current-Voltage concurrent control method devoted to the multiple LED (light-emitting diode) string driver. Isolated DC to DC converter with cascaded chopping switch is proposed for smart lighting system such as light with sensor or back light unit of display, which need to control the current of parallel connected multiple LED stings and regulate DC voltage for micro controller for brightness control. The proposed circuit regulates the current of parallel connected multiple LED strings and additional DC voltage output simultaneously. To verify the performance, experimental results are presented based on the prototype board. 5V, 1A voltage mode electric load and two LED strings with different forward voltages are used for output loads. 23W output power is achieved and measured efficiency is in the range of 85%-87%