• 전기학회논문지
• /
• 제59권2호
• /
• pp.355-358
• /
• 2010

As CMOS technology continues to scale down, signal processing is favorably done in the digital domain, which requires Analog-to-Digital (A/D) Converter to be integrated on-chip. This paper presents a design methodology of 12-bit 1-MS/s Rail-to-Rail fully differential SAR ADC using Deep N-well Switch based on binary search algorithm. Proposed A/D Converter has the following architecture and techniques. Firstly, chip size and power consumption is reduced due to split capacitor array architecture and charge recycling method. Secondly, fully differential architecture is used to reduce noise between the digital part and converters. Finally, to reduce the mismatch effect and noise error, the circuit is designed to be available for Rail-to-Rail input range using simple Deep N-well switch. The A/D Converter fabricated in a TSMC 0.18um 1P6M CMOS technology and has a Signal-to-Noise-and-Distortion-Ratio(SNDR) of 69 dB and Free-Dynamic-Range (SFDR) of 73 dB. The occupied active area is $0.6mm^2$.

• JSTS:Journal of Semiconductor Technology and Science
• /
• 제13권2호
• /
• pp.108-113
• /
• 2013

This paper describes a low power asynchronous successive approximation register (SAR) type 12b analog-to-digital converter (ADC) for biomedical applications in a 0.35 ${\mu}m$ CMOS technology. The digital-to-analog converter (DAC) uses a capacitive split-arrays consisting of 6-b main array, an attenuation capacitor C and a 5-b sub array for low power consumption and small die area. Moreover, splitting the MSB capacitor into sub-capacitors and an asynchronous SAR reduce power consumption. The measurement results show that the proposed ADC achieved the SNDR of 68.32 dB, the SFDR of 79 dB, and the ENOB (effective number of bits) of 11.05 bits. The measured INL and DNL were 1.9LSB and 1.5LSB, respectively. The power consumption including all the digital circuits is 6.7 ${\mu}W$ at the sampling frequency of 100 KHz under 3.3 V supply voltage and the FoM (figure of merit) is 49 fJ/conversion-step.

• Smart Structures and Systems
• /
• 제9권2호
• /
• pp.105-125
• /
• 2012

A modified Pagano method is developed for the three-dimensional (3D) free vibration analysis of simply-supported, multilayered functionally graded material (FGM) circular hollow cylinders with a constant rotational speed with respect to the meridional direction of the cylinders. The material properties of each FGM layer constituting the cylinders are regarded as heterogeneous through the thickness coordinate, and then specified to obey a power-law distribution of the volume fractions of the constituents, and the effects of centrifugal and Coriolis accelerations, as well as the initial hoop stress due to rotation, are considered. The Pagano method, which was developed for the static and dynamic analyses of multilayered composite plates, is modified in that a displacement-based formulation is replaced by a mixed formulation, the complex-valued solutions of the system equations are transferred to the real-valued solutions, a successive approximation method is adopted to extend its application to FGM cylinders, and a propagator matrix method is developed to reduce the time needed for its implementation. These modifications make the Pagano method feasible for multilayered FGM cylinders, and the computation in the implementation is independent of the total number of the layers, thus becoming less time-consuming than usual.

• 대한전기학회:학술대회논문집
• /
• 대한전기학회 1996년도 하계학술대회 논문집 B
• /
• pp.1359-1361
• /
• 1996

This paper describes a design of real time fuzzy controller using Minimum fuzzy control Rule Selection Method(MRSM). The control algorithm of dynamic systems needs less computation time and memory. To reduce the computation time of fuzzy logic controller, minimum number of rules are to be selected for the fuzzy input variable. The universe of discourse is divided by the number of linguistic labels to allocate the assigned membership function to the fuzzy input variables. In this case, since fuzzy input variables are continuous, scale factor SU is tuned independently. According to increment of SU control surface is improved to adapt the change of system parameter. At this, crisp control surface is increased. With the increament of crisp control surface, fuzzy control surface is reduced. When error state deviates from desirable error state, crisp control surface is more useful than fuzzy control surface for obtaining fast rising time.

• Structural Engineering and Mechanics
• /
• 제41권6호
• /
• pp.759-773
• /
• 2012

The objective of this paper is to present an energy-based method for calculating target displacement of RC structures. The method, which uses the Newmark-Hall pseudo-velocity spectrum, is called the "Pseudo-velocity Spectrum (PSVS) Method". The method is based on the energy balance concept that uses the equality of energy demand and energy capacity of the structure. First, nonlinear static analyses are performed for five, eight and ten-story RC frame structures and pushover curves are obtained. Then the pushover curves are converted to energy capacity diagrams. Seven strong ground motions that were recorded at different soil sites in Turkey are used to obtain the pseudo-acceleration and the pseudo-velocity response spectra. Later, the response spectra are idealised with the Newmark-Hall approximation. Afterwards, energy demands for the RC structures are calculated using the idealised pseudo-velocity spectrum. The displacements, obtained from the energy capacity diagrams that fit to the energy demand values of the RC structures, are accepted as the energy-based performance point of the structures. Consequently, the target displacement values determined from the PSVS Method are checked using the displacement-based successive approach in the Turkish Seismic Design Code. The results show that the target displacements of RC frame structures obtained from the PSVS Method are very close to the values calculated by the approach given in the Turkish Seismic Design Code.

• Geomechanics and Engineering
• /
• 제16권6호
• /
• pp.619-626
• /
• 2018

A simple prediction procedure was investigated for calculating the stresses and displacements of a circular opening. Unlike existed approaches, the proposed approach starts each step with a radius increment. The stress for each annulus could be obtained analytically, while strain increments for each step can be determinate numerically from the compatility equation by finite difference approximation, flow rule and Hooke's law. In the successive manner, the distributions of stresses and displacements could be found. It should be noted that the finial radial stress and displacement were equal to the internal supporting pressure and deformation at the tunnel wall, respectively. By assuming different plastic radii, GRC and the evolution curve of plastic radii and internal supporting pressures could be obtained conveniently. Then the real plastic radius can be calculated by using linear interpolation in the evolution curve. Some numerical and engineering examples were performed to demonstrate the accuracy and validity for the proposed procedure. The comparisons results show that the proposed procedure was faster than that in Lee and Pietrucszczak (2008). The influence of annulus number and dilation on the accuracy of solutions was also investigated. Results show that the larger the annulus number was, the more accurate the solutions were. Solutions in Park et al. (2008) were significantly influenced by dilation.

• Journal of Power Electronics
• /
• 제17권2호
• /
• pp.476-489
• /
• 2017

Under partial shading conditions (PSCs), multiple maximums may be exhibited on the P-U curve of string inverter photovoltaic (PV) systems. Under such conditions, heuristic methods are invalid for extracting a global maximum power point (GMPP); intelligent algorithms are time-consuming; and model-based methods are complex and costly. To overcome these shortcomings, a novel hybrid MPPT (MPF-IP&O) based on a model-based peak forecasting (MPF) method and an improved perturbation and observation (IP&O) method is proposed. The MPF considers the influence of temperature and does not require solar radiation measurements. In addition, it can forecast all of the peak values of the PV string without complex computation under PSCs, and it can determine the candidate GMPP after a comparison. Hence, the MPF narrows the searching range tremendously and accelerates the convergence to the GMPP. Additionally, the IP&O with a successive approximation strategy searches for the real GMPP in the neighborhood of the candidate one, which can significantly enhance the tracking efficiency. Finally, simulation and experiment results show that the proposed method has a higher tracking speed and accuracy than the perturbation and observation (P&O) and particle swarm optimization (PSO) methods under PSCs.

• 대한전자공학회논문지SP
• /
• 제37권4호
• /
• pp.35-45
• /
• 2000

본 논문에서는 동영상에 효과적으로 적용 가능한 정점 기반 모양 정보 부호화 알고리즘을 제안한다. 제안한 방법은 영상 사이에 존재하는 시간적 중복성을 해결하기 위해 현재 영상의 외곽선으로부터 정점을 선택 할 뿐 아니라 이미 근사화 되어 부호화된 이전 영상으로부터도 정점을 선택하여 상대적으로 부호화하였으며 고정된 오차 한계 이내에서 비트 발생량이 최소가 되도록 정점을 선택한다. 이는 코드표현 방법이 정해져 있을 때 비율-왜곡 측면에서 최적이다. 쟁점 선택은 가중치를 갖는 방향그래프에서의 최단 경로 탐색으로 모델링되어 최적의 정점을 선택하도록 하였으며 실험 결과 기존의 모양 정보 부호화 방법보다 적은 비트율을 요구하였다. 제안한 방법은 실시간 부호화를 필요로 하지 않는 저장 매체를 위한 객체 기반 부호화 시스템 및 웹을 통한 동영상 전송에 이용될 수 있다.

• 전자공학회논문지
• /
• 제50권6호
• /
• pp.85-90
• /
• 2013

본 논문에서는 본 연구실에서 제안된 Dummy Gate Assisted MOSFET을 이용하여 6bit SAR (Successive Approximation Register) ADC를 설계하였으며 이에 대한 대조군으로 Conventional MOSFET으로 동일한 회로를 설계하여 두 회로의 Co-60 Gamma Ray에 의한 누적방사선 영향을 비교 분석해 보았다. 설계된 SAR ADC는 Binary Capacitor DAC과 Dynamic Latch 형태의 Comparator 그리고 Logic으로 구성이 되었으며, 0.35um standard CMOS공정으로 제작되었다. 방사선 조사 후 Conventional MOSFET을 이용한 ADC는 정상동작하지 못하였지만, Dummy Gate Assisted MOSFET을 사용한 ADC는 방사선 조사 후 DNL은 0.7LSB에서 2.0LSB, INL은 1.8LSB에서 3.2LSB로 다소 증가하였으나 정상적인 A/D 변환이 가능하다는 것을 확인하였다.

• JSTS:Journal of Semiconductor Technology and Science
• /
• 제16권6호
• /
• pp.760-770
• /
• 2016

A 12-bit 750 kS/s Dual-Sampling Successive Approximation Register Analog-to-Digital Converter (SAR ADC) technique with reduced Capacitive DAC (CDAC) is presented in this paper. By adopting the Adaptive Power Control (APC) technique for the two-stage latched type comparator and using bootstrap switch, power consumption can be reduced and overall system efficiency can be optimized. Bootstrapped switches also are used to enhance the sampling linearity at a high input frequency. The proposed SAR ADC reduces the average switching energy compared with conventional SAR ADC by adopting reduced the Most Significant Bit (MSB) cycling step with Dual-Sampling of the analog signal. This technique holds the signal at both comparator input asymmetrically in sample mode. Therefore, the MSB can be calculated without consuming any switching energy. The prototype SAR ADC was implemented in $0.18-{\mu}m$ CMOS technology and occupies $0.728mm^2$. The measurement results show the proposed ADC achieves an Effective Number-of-Bits (ENOB) of 10.73 at a sampling frequency of 750 kS/s and clock frequency of 25 MHz. It consumes only 0.13 mW from a 5.0-V supply and achieves the INL and DNL of +2.78/-2.45 LSB and +0.36/-0.73 LSB respectively, SINAD of 66.35 dB, and a Figures-of-Merit (FoM) of a 102 fJ/conversion-step.