• 한국재료학회지
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• 제26권8호
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• pp.430-437
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• 2016

Aluminum oxide ($Al_2O_3$) thin films were grown by atomic layer deposition (ALD) using a new Al metalorganic precursor, dimethyl aluminum sec-butoxide ($C_{12}H_{30}Al_2O_2$), and water vapor ($H_2O$) as the reactant at deposition temperatures ranging from 150 to $300^{\circ}C$. The ALD process showed typical self-limited film growth with precursor and reactant pulsing time at $250^{\circ}C$; the growth rate was 0.095 nm/cycle, with no incubation cycle. This is relatively lower and more controllable than the growth rate in the typical $ALD-Al_2O_3$ process, which uses trimethyl aluminum (TMA) and shows a growth rate of 0.11 nm/cycle. The as-deposited $ALD-Al_2O_3$ film was amorphous; X-ray diffraction and transmission electron microscopy confirmed that its amorphous state was maintained even after annealing at $1000^{\circ}C$. The refractive index of the $ALD-Al_2O_3$ films ranged from 1.45 to 1.67; these values were dependent on the deposition temperature. X-ray photoelectron spectroscopy showed that the $ALD-Al_2O_3$ films deposited at $250^{\circ}C$ were stoichiometric, with no carbon impurity. The step coverage of the $ALD-Al_2O_3$ film was perfect, at approximately 100%, at the dual trench structure, with an aspect ratio of approximately 6.3 (top opening size of 40 nm). With capacitance-voltage measurements of the $Al/ALD-Al_2O_3/p-Si$ structure, the dielectric constant of the $ALD-Al_2O_3$ films deposited at $250^{\circ}C$ was determined to be ~8.1, with a leakage current density on the order of $10^{-8}A/cm^2$ at 1 V.

• 전기전자학회논문지
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• 제27권4호
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• pp.644-649
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• 2023

DRAM(Dynamic Random Access Memory) 스케일링 과정에서 발생하는 셀간 거리의 감소에 따라 STI(Shallow Trench Isolation)두께 감소는 문턱이하 누설이 증가되는 패싱워드라인 효과를 유발한다. 인접한 패싱워드라인에 인가된 전압으로 인한 문턱이하누설 전류의 증가는 데이터 보존시간에 영향을 주며, 리프레시의 동작 횟수가 증가되어 DRAM의 소비 전력을 증가시키는 요인이 된다. 본 논문에서는 TCAD Simulation을 통해 패싱워드라인 효과에 대한 원인을 확인한다. 결과적으로, 패싱워드라인 효과가 발생하는 DRAM 동작상황을 확인하고, 이때 패싱워드라인 효과로 인해 전체 누설전류의 원인에 따른 비중이 달라지는 것을 확인하였다. 이를 통해, GIDL(Gate Induced Drain Leakage)에 의한 누설전류뿐만 아니라 문턱이하 누설전류를 고려의 필요성을 확인하며 이에 따른 DRAM 구조의 개선 방향의 지침이 될 수 있다.

• 전자공학회논문지
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• 제49권12호
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• pp.194-200
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• 2012

본 논문에서는 SPICE 시뮬레이션을 위한 고전압 insulated gate bipolar transistor(IGBT)의 개선된 모델을 제안하였다. IGBT를 부속 소자인 MOSFET과 BJT의 조합으로 구성하고, 각 소자의 각종 파라미터 값을 조절하여 기본적인 전류-전압 특성과 온도변화에 따른 출력특성의 변화 등을 재현하였다. 그리고 비선형적인 리버스 트랜스퍼 커패시턴스 등의 기생 커패시턴스의 전압에 따른 변화를 높은 정확도로 재현하기 위해, 복수의 접합 다이오드, 이상적인 전압 및 전류 증폭기, 전압제어 저항, 저항과 커패시터 수동소자 등을 추가하였다. 본 회로모델을 1200V급의 트렌치 게이트 IGBT의 모델링에 이용하였으며, 실측자료와 비교하여 통해 모델의 정확도를 검증하였다.

• Transactions on Electrical and Electronic Materials
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• 제5권5호
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• pp.169-172
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• 2004

Deep sub-micron device required to get the superior ultra thin gate oxide characteristics. In this research, I will recommend a novel shallow trench isolation structure(STI) for thin gate oxide and a $N_2$O gate oxide 30 $\AA$ by NO ambient process. The local oxidation of silicon(LOCOS) isolation has been replaced by the shallow trench isolation which has less encroachment into the active device area. Also for $N_2$O gate oxide 30 $\AA$, ultra thin gate oxide 30 $\AA$ was formed by using the $N_2$O gate oxide formation method on STI structure and LOCOS structure. For the metal electrode and junction, TiSi$_2$ process was performed by RTP annealing at 850 $^{\circ}C$ for 29 sec. In the viewpoints of the physical characteristics of MOS capacitor, STI structure was confirmed by SEM. STI structure was expected to minimize the oxide loss at the channel edge. Also, STI structure is considered to decrease the threshold voltage, result in a lower Ti/TiN resistance( Ω /cont.) and higher capacitance-gate voltage(C- V) that made the STI structure more effective. In terms of the TDDB(sec) characteristics, the STI structure showed the stable value of 25 % ～ 90 % more than 55 sec. In brief, analysis of the ultra thin gate oxide 30 $\AA$ proved that STI isolation structure and salicidation process presented in this study. I could achieve improved electrical characteristics and reliability for deep submicron devices with 30 $\AA$ $N_2$O gate oxide.

• Geomechanics and Engineering
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• 제18권4호
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• pp.407-415
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• 2019

A controlled low strength material (CLSM) is a highly flowable cementitious material used for trench backfilling. However, when applying vertical loads to backfilled trenches, shear failure or differential settlement may occur at the interface between the CLSM and natural soil. Hence, this study aims to evaluate the characteristics of the interface friction between the CLSM and soils based on curing time, gradation, and normal stress. The CLSM is composed of fly ash, calcium sulfoaluminate cement, sand, silt, water, and an accelerator. To investigate the engineering properties of the CLSM, flow and unconfined compressive strength tests are carried out. Poorly graded and well-graded sands are selected as the in-situ soil adjacent to the CLSM. The direct shear tests of the CLSM and soils are carried out under three normal stresses for four different curing times. The test results show that the shear strengths obtained within 1 day are higher than those obtained after 1 day. As the curing time increases, the maximum dilation of the poorly graded sand-CLSM specimens under lower normal stresses also generally increases. The maximum contraction increases with increasing normal stress, but it decreases with increasing curing time. The shear strengths of the well-graded sand-CLSM interface are greater than those of the poorly graded sand-CLSM interface. Moreover, the friction angle for the CLSM-soil interface decreases with increasing curing time, and the friction angles of the well-graded sand-CLSM interface are greater than those of the poorly graded sand-CLSM interface. The results suggest that the CLSM may be effectively used for trench backfilling owing to a better understanding of the interface shear strength and behavior between the CLSM and soils.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2001년도 하계학술대회 논문집
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• pp.33-36
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• 2001

Chemical mechanical polishing(CMP) process has been widely used to planarize dielectric layers, which can be applied to the integrated circuits for deep sub-micron technology. The rise throughput and the stability in the device fabrication can be obtained by applying of CMP process to STI structure in 0.18$\mu\textrm{m}$ m semiconductor device. The reverse moat process has been added to employ in of each thin films in STI-CMP was not equal, hence the devices must to be effected, that is, the damage was occurred in the device area for the case of excessive CMP process and the nitride film was remained on the device area for the case of insufficient CMP process, and than, these defects affect the device characteristics. Also, we studied the High Selectivity Slurry(HSS) to perform global planarization without reverse moat step.

• 한국정보과학회:학술대회논문집
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• 한국정보과학회 1998년도 가을 학술발표논문집 Vol.25 No.2 (2)
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• pp.674-676
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• 1998

소자가 sub-quarter um급으로 축소됨에 따라 STI(Shallow Trench Isolation) 기술은 고 집적도의 ULSI 구현에 있어서 중요한 격리 방법으로 많이 사용되고 있다. 현재의 STI 기술은 주로 실리콘 기판을 식각 후 절연물질로 빈 공백이 없이 채우는 (void-free gap filling) 방법 [1,2]과 절연물질을 다시 표면 근처까지 CMP(Chemical Mechnical Polishing)로 etchback하여 평탄화를 하는 방법이 주요한 기술이 되고 있다. 또한 STI 구조로된 격리구조에서 만들어진 MOSFET의 전기적인 특성은 트랜치 격리의 상부 부분의 형태와 gap-filling 물질에 따라 큰 영향을 받게된다. 따라서 본 논문에서는 STI 구조로 만들어진 격리 구조에서 MOSFET의 hump 특성에 관해 연구하였다. 그 결과 hump는 STI 모서리에서 필드 옥사이드의 recess에 의한 모서리 부분에서의 전계 집중과 boron의 segration에 기인한 농도 감소로 인해 hump가 발생하는 것으로 나타났다.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2007년도 7th International Meeting on Information Display 제7권1호
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• pp.486-489
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• 2007

Carbon nanotube (CNT) cathodes having a trench structure similar to the structure of the gated triodetype cathode were successfully fabricated by a screenprinting method with multi-walled carbon nanotubes. We observed that a liquid method not only readily removes the organic residues on the CNT films, but also satisfactorily protrudes the CNTs out of the electrode surface. The CNT cathodes prepared by the liquid method showed a turned-on field of $1.4\;V/{\mu}m$. The emission current density of them was about $3.1\;mA/cm^2$ at the electric field of $3\; V/{\mu}m$. The liquid method appears to be a promising surface treatment of CNT cathode for gated triode-type FEDs applications.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2009년도 제38회 동계학술대회 초록집
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• pp.249-249
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• 2010

The effect of forming a passivation layer was investigated in superconformal Cu gap-filling of the nano-scale trench with atomic-layer deposited (ALD)-Ru glue layer. It was discovered that the nucleation and growth of Cu during metal-organic chemical vapor deposition (MOCVD) were affected by hydrogen plasma treatments. Specifically, as the plasma pretreatment time increased, Cu nucleation was suppressed proportionally. XPS and Thermal Desorption Spectroscopy indicated that hydrogen atoms passivate the Ru surface, which leads to suppression of Cu nucleation owing to prevention of adsorption of Cu precursor molecules. For gap-fill property, sub 60-nm ALD Ru trenches without the plasma pretreatment was blocked by overgrown Cu after the Cu deposition. With the plasma pretreatment, superconformal gap filling of the nano-scale trenches was achieved due to the suppression of Cu nucleation near the entrances of the trenches. Even the plasma pretreatment with bottom bias leads to the superconformal gap-filling.

• 한국분말재료학회지
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• 제20권1호
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• pp.19-23
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• 2013

Ru films were successfully prepared by plasma-enhanced atomic layer deposition (PEALD) using $Ru(EtCp)_2$ and $NH_3$ plasma. To optimize Ru PEALD process, the effect of growth temperature, $NH_3$ plasma power and $NH_3$ plasma time on the growth rate and preferred orientation of the deposited film was systemically investigated. At a growth temperature of $270^{\circ}C$ and $NH_3$ plasma power of 100W, the saturated growth rate of 0.038 nm/cycle was obtained on the flat $SiO_2$/Si substrate when the $Ru(EtCp)_2$ and $NH_3$ plasma time was 7 and 10 sec, respectively. When the growth temperature was decreased, however, an increased $NH_3$ plasma time was required to obtain a saturated growth rate of 0.038 nm/cycle. Also, $NH_3$ plasma power higher than 40 W was required to obtain a saturated growth rate of 0.038 nm/cycle even at a growth temperature of $270^{\circ}C$. However, (002) preferred orientation of Ru film was only observed at higher plasma power than 100W. Moreover, the saturation condition obtained on the flat $SiO_2$/Si substrate resulted in poor step coverage of Ru on the trench pattern with an aspect ratio of 8:1, and longer $NH_3$ plasma time improved the step coverage.