• Proceedings of the Korean Magnestics Society Conference
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• 2007.05a
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• pp.243.1-243.1
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• 2007

• Journal of KIISE:Computing Practices and Letters
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• v.10 no.2
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• pp.134-145
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• 2004

With rapid growth in the amount of data transferred on the Internet, traditional storage systems have reached the limits of their capacity and performance. SAN (Storage Area Network), which connects hosts to disk with the Fibre Channel switches, provides one of the powerful solutions to scale the data storage and servers. In this environment, the maintenance of data consistency among hosts is an important issue because multiple hosts share the files on disks attached to the SAN. To preserve data consistency, each host can execute the disk I/O whenever disk read and write operations are requested. However, frequent disk I/O requests cause the deterioration of the overall performance of a SAN cluster. In this paper, we introduce a SANtopia global buffer manager to improve the performance of a SAN cluster reducing the number of disk I/Os. We describe the design and algorithms of the SANtopia global buffer manager, which provides a buffer cache sharing mechanism among the hosts in the SAN cluster. Micro-benchmark results to measure the performance of block I/O operations show that the global buffer manager achieves speed-up by the factor of 1.8-12.8 compared with the existing method using disk I/O operations. Also, File system micro-benchmark results show that SANtopia file system with the global buffer manager improves performance by the factor of 1.06 in case of directories and 1.14 in case of files compared with the file system without a global buffer manager.

• Journal of KIISE:Computing Practices and Letters
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• v.16 no.4
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• pp.462-466
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• 2010

A new buffer cache management scheme that aims at reducing power consumption in mixed HDD and NAND flash memory storage systems is presented. The proposed scheme reduces power consumption by considering different energy-consumption rate of storage devices, I/O operation type (read or write), and reference potential of cached blocks in terms of both recency and frequency. Simulation shows that the proposed scheme reduces power consumption by 18.0% on average and up to 58.9%.

• Journal of the Korean Operations Research and Management Science Society
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• v.21 no.2
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• pp.17-33
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• 1996

Automatic transfer defined as an integrated system with a number of workstations, interstation storage buffers, automatic device and a control system, play a major role in ass production systems. Due to high capital investment needed for an automatic transferline, greater care should be taken in its design so as to maximize the system performance. One may to control the system performance is to control buffer storage. To control the interstation work-in-process inventory, we propose dual limit switches which control the buffer storage with two parameters, R and r. Under the policy, proceding station is forced down when the inventory level in the buffer reaches R until the level falls to r. For the model developed, we analyze the system characteristics and find the optimal control parameters with a serach procedure.

• Journal of the Institute of Electronics and Information Engineers
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• v.53 no.1
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• pp.36-42
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• 2016

In multi-level-cell based storage devices, TLC NAND has been employed solid state drive due to cost effectiveness. Since TLC has slow performance and low endurance compared with MLC, TLC based storage has adopted SLC buffer scheme to improve performance. To improve SLC buffer scheme, this paper proposes page overwriting method in SLC block. This method provides data updates without erase operation within a limited number. When SLC buffer area is filled up, FTL should execute copying valid pages and erasing it. The proposed method reduces erase counts by 50% or more compared with previous SLC buffer scheme. Simulation results show that the proposed SLC buffer overwrite method achieves 2 times write performance improvement.

• Journal of applied mathematics & informatics
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• v.33 no.1_2
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• pp.185-191
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• 2015

This paper considers a discrete-time buffer system with session-based arrivals, an infinite storage capacity and one unreliable output line. There are multiple different types of sessions and the output line is governed by a finite state Markov chain. Based on a generating functions approach, we obtain an exact expression for the mean buffer content.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.15 no.6
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• pp.129-134
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• 2015

This paper analyzes file access characteristics of smartphone apps and finds that a large portion of file writes are performed only once. Based on this observation, we present a new buffer cache management scheme that considers this characteristics. Buffer cache improves storage performance by maintaining hot file data in memory thereby servicing subsequent requests without storage accesses. However, it should flush modified data to storage in order to resist system crashes. The proposed scheme evicts cache data that has been written only once upon flushes, thus improving cache space utilization. Simulation experiments show that the proposed scheme improves cache hit ratio by 5-33% and power consumption by 27-92%.

• JSTS:Journal of Semiconductor Technology and Science
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• v.5 no.4
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• pp.262-269
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• 2005

Semiconductor scientists and engineers ideally desire the faster but the cheaper non-volatile memory devices. In practice, no single device satisfies this desire because a faster device is expensive and a cheaper is slow. Therefore, in this paper, we use heterogeneous non-volatile memories and construct an efficient hierarchy for them. First, a small RAM device (e.g., MRAM, FRAM, and PRAM) is used as a write buffer of flash memory devices. Since the buffer is faster and does not have an erase operation, write can be done quickly in the buffer, making the write latency short. Also, if a write is requested to a data stored in the buffer, the write is directly processed in the buffer, reducing one write operation to flash storages. Second, we use many types of flash memories (e.g., SLC and MLC flash memories) in order to reduce the overall storage cost. Specifically, write requests are classified into two types, hot and cold, where hot data is vulnerable to be modified in the near future. Only hot data is stored in the faster SLC flash, while the cold is kept in slower MLC flash or NOR flash. The evaluation results show that the proposed hierarchy is effective at improving the access time of flash memory storages in a cost-effective manner thanks to the locality in memory accesses.

• Journal of KIISE:Computer Systems and Theory
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• v.37 no.5
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• pp.285-291
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• 2010

Flash memory has many good features such as small size, shock-resistance, and low power consumption, but the cost of flash memory is still high to substitute for hard disk entirely. Recently, some mobile devices, such as laptops, attempt to use both flash memory and hard disk together for taking advantages of merits of them. However, existing OSs (Operating Systems) are not optimized to use the heterogeneous storage media. This paper presents a new buffer cache management scheme. First, we allocate buffer cache space according to access patterns of block references and the characteristics of storage media. Second, we prefetch data blocks selectively according to the location of them and access patterns of them. Third, we moves destaged data from buffer cache to hard disk or flash memory considering the access patterns of block references. Trace-driven simulation shows that the proposed schemes enhance the buffer cache hit ratio by up to 29.9% and reduce the total I/O elapsed time by up to 49.5%.

• Korean Journal of Clinical Laboratory Science
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• v.44 no.1
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• pp.24-30
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• 2012

In this study, we have examined the effects of the storage time and temperature on DNA quality and have also studied the effects of the hydration buffer in which DNA is dissolved. This study was performed using 160 human blood samples collected with informed consent from 2007 to 2008 in the hospital where this cohort study was performed. The DNA extracted was dissolved using distilled water (DW) or Tris-EDTA (TE) buffer, and stored in the deep freezer or refrigerator for up to 10 weeks at $-70^{\circ}C$, $-20^{\circ}C$, $4^{\circ}C$, and $25^{\circ}C$, respectively. DNA integrity was determined by the degree of smearing of DNA on the gel. After four weeks, all of the 20 DNA samples dissolved in DW and stored at $25^{\circ}C$ were entirely degraded. After 10 weeks, 6 of the 20 DNA samples dissolved in TE buffer and stored at $25^{\circ}C$ were fairly degraded, and 4 of the 20 DNA samples dissolved in DW and stored at $4^{\circ}C$ were fairly degraded. The 20 DNA samples dissolved in TE buffer and stored at $4^{\circ}C$ were stable for 10 weeks. DNA samples stored at $-20^{\circ}C$ and $-70^{\circ}C$ did not appear to degrade in either DW or TE buffer, even at the 10-week point. We suggest that TE buffer should use for DNA elution, in order to protect against degradation and to preserve DNA for a long period of time, and the samples should be stored at $-20^{\circ}C$ or $-70^{\circ}C$.