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H. Kim and S. Ahn, "BPLRU: A Buffer Management Scheme for Improving Random Writes in Flash Storage," in FAST '08: Proceedings of the 6th USENIX Symposium on File and Storage Technologies, pp.239-252, 2008.
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J. Choi, S. Cho, S. Noh, S. Lyul, and Y. Cho, "Analytical Predictionof Buffer Hit Ratios," Electronics Letters, vol.36, no.1, pp.10-11, Jan2000.
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S. Jiang, F. Chen, and X. Zhang, "Clock-pro: An Effective Improvement of the Clock Replacement," in ATEC '05: Proceedings of the Annual Conference on USENIX Annual Technical Conference. Berkeley, CA, USA: USENIX Association, pp.323-336, 2005.
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D. Lee, J. Choi, J.-H. Kim, S. Noh, S. L. Min, Y. Cho, and C. S. Kim, "LRFU: A Spectrum of Policies that Subsumes the Least Recently Used and Least Frequently Used Policies," Computers, IEEE Transaction on, vol.50, no.12, pp.1352-1361, Dec 2001.
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J.M. Kim, J. Choi, J. Kim, S.H. Noh, S.L. Min, Y. Cho, and C.S. Kim, "A Low-overhead High-Performance Unified Buffer Management Scheme that Exploits Sequential and Looping References," In Proceedings of the 4th conference on Symposium on Operating System Design and Implementation, 2000.
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S.-y. Park, D. Jung, J.-u. Kang, J.-s. Kim, and J. Lee, "CFLRU: A Replacement Algorithm for Flash Memory," in Proceedings of the 2006 International Conference on Compilers, Architecture and Synthesis for Embedded Systems, ser. CASES '06. New York, NY, USA: ACM, pp.234-241, 2006.
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H. Jung, H. Shim, S. Park, S. Kang, and J. Cha, "LRU-WSR: Integration of LRU and Writes Sequence Reordering for Flash Memory," Consumer Electronics, IEEE Transactions on, vol.54, no.3, pp.1215-1223, August 2008.
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