• Title/Summary/Keyword: Stack Voltage

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Fuel cell stack modeling considering dynamic characteristic of stack voltage according to load variation (부하변화에 따른 스택전압 과도특성을 고려한 연료전지 모델링)

  • Ko, Jeong-Min;Kim, Jong-Soo;Choe, Gyu-Yeong;Kang, Hyun-Soo;Lee, Byoung-Kuk
    • Proceedings of the KIEE Conference
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    • 2008.07a
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    • pp.1102-1103
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    • 2008
  • 본 논문에서는 연료전지의 정특성과 전압의 과도 특성을 고려한 연료전지 모델링을 하였다. 전기화학적 방정식으로부터 연료전지의 정특성을 모델링하였고, 실험결과 파형을 분석하여 RC 시상수를 이용하여 과도특성을 모델링하였다. 모델링은 Matalab Simulinik를 이용하여 이루어졌으며, NEXA system을 이용하여 실험한 결과와 비교, 분석하여 이 모델링의 유용성을 검증하였다.

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High-Efficiency Grid-Tied Power Conditioning System for Fuel Cell Power Generation

  • Jeong, Jong-Kyou;Han, Byung-Moon;Lee, Jun-Young;Choi, Nam-Sup
    • Journal of Power Electronics
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    • v.11 no.4
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    • pp.551-560
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    • 2011
  • This paper proposes a grid-tied power conditioning system for the fuel cell power generation, which consists of a 2-stage DC-DC converter and a 3-phase PWM inverter. The 2-stage DC-DC converter boosts the fuel cell stack voltage of 26-48V up to 400V, using a hard-switching boost converter and a high-frequency unregulated LLC resonant converter. The operation of the proposed power conditioning system was verified through simulations with PSCAD/EMTDC software. Based on the simulation results, a laboratory experimental set-up was built with a 1.2kW PEM fuel-cell stack to verify the feasibility of hardware implementation. The developed power conditioning system shows a high efficiency of 91%, which is a very positive result for the commercialization.

multi-stack gate dielectric 구조를 통한 LTPS TFT 특성

  • Baek, Gyeong-Hyeon;Jeong, Seong-Uk;Jang, Gyeong-Su;Park, Hyeong-Sik;Lee, Won-Baek;Yu, Gyeong-Yeol;Lee, Jun-Sin
    • Proceedings of the Korean Vacuum Society Conference
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    • 2010.08a
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    • pp.200-200
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    • 2010
  • 이 논문에서는 field-effect mobility를 향상시키기 위해 triple-layer (SiNx/SiO2/SiOxNy stack 구조)를 gate dielectric material 로 LTPS TFTs에 적용하였다. 이는 플라즈마 처리 기법과 적층구조의 효과적인 in-situ 공정을 이용하여 interface trap과 mobile charge를 낮추어 높은 이동도의 결과를 생각하고 실험하였다. 실험은 SiO2 gatedielectric과 triple-gate dielectric의 C-V curve를 1 MHz의 주파수에서 측정하였다. 또한 Transfer characteristics를 single SiO2 gatedielectric과 triple-gate dielectric of SiNx/SiO2/SiOxNy를 STA 장비를 이용해 측정하였다. 위의 측정을 통해 threshold voltage, mobility, subtheshold swing, driving current, ON/OFF current ratio를 비교 분석하였다.

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Design of a New Dispensing System Featuring Piezoelectric Actuator (압전 작동기를 이용한 새로운 디스펜싱 시스템 설계)

  • Hung, Nguyen Quoc;Choi, Min-Kyu;Yoon, Bo-Young;Choi, Seung-Bok
    • Proceedings of the Korean Society for Noise and Vibration Engineering Conference
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    • 2006.05a
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    • pp.821-826
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    • 2006
  • This paper presents a novel type of hybrid dispensing head for IC fabrication and surface mount technology. The proposed mechanism consists of solenoid valve and piezoelectric stack as actuators, and provides positive-displacement and jet dispensing. The positive-displacement dispensing can produce desired adhesive amount without viscosity effect, while the jet dispensing can produce high precision adhesive amount. In order to determine the relationship between required voltage of the piezo actuator and needle displacement, both static and dynamic analysis are undertaken, In addition, finite element analysis is performed in order to find optimal design parameters. Dispensing flow rate and pressure in the chamber are evaluated through fluid dynamic model.

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Character Analysis of 1.2kW Proton Exchange Membrane Fuel cell (1.2kW 고분자 전해질형 연료전지 특성 분석)

  • Kim, Sung-Jun;Choi, Kwang-Ju;Kwon, Soon-Kurl;Suh, Ki-Young;Nakaoka, M.;Lee, Hyun-Woo
    • Proceedings of the KIPE Conference
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    • 2005.07a
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    • pp.781-784
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    • 2005
  • This paper is aimed at presenting a proton exchange membrane ( PEM ) fuel cell stack. The fuel cell electrical output voltage and current (V-I) characteristic is described for the first time by a simplified closed form suitable. The characteristics obtained from the simulation are compared with the experimental results on a Ballard commercial fuel cell stack as well as to the manufacturer given data.

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Influences of Coatings and Solution Corrosivity on Cathodic Protection of Metallic Materials

  • Yoo, Y.R.;Chang, H.Y.;Jin, T.E.;Kim, Y.S.
    • Corrosion Science and Technology
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    • v.5 no.3
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    • pp.106-111
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    • 2006
  • Painting has protected metallic stack but the paint films may be degraded and corrosion problem can be arisen. To protect the painted metal stack, cathodic protection can be applied. If cathodic protection is applied to bare metal, only small area may be protected. However, if cathodic protection is applied to painted metal surface, large area can be protected and the lifetime of paint films can be extended. High corrosion resistant alloys were corroded at a Flue Gas Desulfurization (FGD) facility of power plant within a short period and thus cathodic protection can be used to protect these metals. On the base of computer simulation, if cathodic protection is applied to bare metal in a FGD environment, it was estimated that applied current could almost be spent to protect area near the anode. However, if cathodic protection is applied to high resistant-coated metal, the much larger area from the anode could be effectively protected.

Improving the Stability of Series-Connected Solid Oxide Fuel Cells by Modifying the Electrolyte Composition

  • Kim, Young Je;Lim, Hyung-Tae
    • Journal of Electrochemical Science and Technology
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    • v.12 no.1
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    • pp.159-165
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    • 2021
  • YSZ based anode supported solid oxide fuel cells (SOFCs) were prepared, and two cells with different electrolyte thicknesses were connected in series for the simulation of a cell-imbalanced fuel cell stack. Pure YSZ cells in a series connection exhibited a rapid degradation when a thick electrolyte cell was operated under a negative voltage. On the other hand, ceria added-YSZ cells in a series connection were stable under similar operating conditions, and the power density and impedance were about the same as those before tests. The improved stability was due to the reduction of internal partial pressure in the electrolyte by locally increasing the electronic conduction. Thus, we propose a new protection method, i.e., the local addition of ceria in the YSZ electrolyte, to extend the lifetime of a cell-imbalanced SOFC stack.

A Novel Non-Isolated DC-DC Converter with High Efficiency and High Step-Up Voltage Gain (고효율 및 고변압비를 가진 새로운 비절연형 컨버터)

  • Amin, Saghir;Tran, Manh Tuan;Choi, Woojin
    • Proceedings of the KIPE Conference
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    • 2019.07a
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    • pp.11-13
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    • 2019
  • This paper proposes a novel high step-up non-isolated DC-DC converter, suitable for regulating dc bus in various inherent low voltage micro sources especially for photovoltaic (PV) and fuel cell sources. This novel high voltage Non-isolated Boost DC-DC converter topology is best replacement, where high voltage conversion ratio is required without the transformer and also need continuous input current. Since the proposed topology utilizes the stack-based structure, the voltage gain, and the efficiency are higher than other conventional non-isolated converters. Switches in this topology is easier to control since its control signal is grounding reference. Also, there is no need of extra gate driver and extra power supply for driver circuit, which reduces the cost and size of system. In order to show the feasibility and practicality of the proposed topology principle operation, steady state analysis and simulation result is presented and analyzed in detail. To verify the performance of proposed converter and theoretical analysis 360W laboratory prototype is implemented.

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Investigating InSnZnO as an Active Layer for Non-volatile Memory Devices and Increasing Memory Window by Utilizing Silicon-rich SiOx for Charge Storage Layer

  • Park, Heejun;Nguyen, Cam Phu Thi;Raja, Jayapal;Jang, Kyungsoo;Jung, Junhee;Yi, Junsin
    • Proceedings of the Korean Vacuum Society Conference
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    • 2016.02a
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    • pp.324-326
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    • 2016
  • In this study, we have investigated indium tin zinc oxide (ITZO) as an active channel for non-volatile memory (NVM) devices. The electrical and memory characteristics of NVM devices using multi-stack gate insulator SiO2/SiOx/SiOxNy (OOxOy) with Si-rich SiOx for charge storage layer were also reported. The transmittance of ITZO films reached over 85%. Besides, ITZO-based NVM devices showed good electrical properties such as high field effect mobility of 25.8 cm2/V.s, low threshold voltage of 0.75 V, low subthreshold slope of 0.23 V/dec and high on-off current ratio of $1.25{\times}107$. The transmission Fourier Transform Infrared spectroscopy of SiOx charge storage layer with the richest silicon content showed an assignment at peaks around 2000-2300 cm-1. It indicates that many silicon phases and defect sources exist in the matrix of the SiOx films. In addition, the characteristics of NVM device showed a retention exceeding 97% of threshold voltage shift after 104 s and greater than 94% after 10 years with low operating voltage of +11 V at only 1 ms programming duration time. Therefore, the NVM fabricated by high transparent ITZO active layer and OOxOy memory stack has been applied for the flexible memory system.

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A Study on Low Area ESD Protection Circuit with Improved Electrical Characteristics (향상된 전기적 특성을 갖는 저면적 ESD 보호회로에 관한 연구)

  • Do, Kyoung-Il;Park, Jun-Geol;Kwon, Min-Ju;Park, Kyeong-Hyeon;Koo, Yong-Seo
    • Journal of IKEEE
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    • v.20 no.4
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    • pp.361-366
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    • 2016
  • This paper presents the ESD protection circuit with improved electrical characteristic and area efficiency. The proposed ESD protection circuit has higher holding voltage and lower trigger voltage characteristics than the 3-Stacking LVTSCR. In addition, it has only two stages and has improved Ron characteristics due to short discharge path of ESD current. We analyzed the electrical characteristics of the proposed ESD protection circuit by TCAD simulator. The proposed ESD protection circuit has a small area of about 35% compared with 3-Stacking LVTSCR, The proposed circuit is designed to have improved latch-up immunity by setting the effective base length of two NPN parasitic bipolar transistors as a variable.