• Proceedings of the KIEE Conference
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• 2000.07c
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• pp.2245-2247
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• 2000

The purpose of this paper is to demonstrate for the design and the fabrication of suspended spiral inductors using the micromachining technology. Also. the characteristics of spiral inductors with substrate lossless are simulated by lumped-element model. The absence of the lossy silicon substrate after micormachining results in significantly improved quality factor characteristics of 14. Micromachined spiral inductors have the improvement of a quality factor of about 60% than spiral inductors on silicon which is not micromachined.

• Proceedings of the IEEK Conference
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• 1998.10a
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• pp.645-648
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• 1998

We used a three-dimensional inductance extraction program, Fasthenry for optimal design of the spiral inductors on silicon substrate. The inductance and quality factor of the spiral inductors with various design parameters were calculated so that the optimal parameter value was determined. The spiral inductors then were fabricated using different foundary processes and were measured using the network analyzer and microwave probes. The pad and other parasitics of measurement system were de-embedded using the y-parameter calibration technique. the inductors fabricated using the LG 0.8um process and HP 0.5um process showed the quality factor of 5.8 and 3, respectively. Finally the equivalent circuit farameters of the spiral inductors on silicon substrate were extracted from the measurement data using the matlab.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2004.07b
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• pp.890-893
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• 2004

In this study, Spiral inductors on the $SiO_2/Si$(100) substrate were fabricated by the magnetron sputtering method. Cu thin film with the thickness of 2 ${\mu}m$ was deposited on the substrate. Also we fabricated square inductors through the wet chemical etching technique. The inductors are completely specified by the turn width and the spacing between spirals. Both the width and spacing between spirals were varied from 10 to 60${\mu}m$ and from 20 to 70 ${\mu}m$, respectively. Inductance and Q factor dependent on the frequency were investigated to analyze performance of spiral inductors.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.18 no.3
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• pp.216-218
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• 2005

Planar spiral inductors on silicon substrates were optimally designed using MATLAB, which is a tool to perform numerical computations with matrices. The equivalent circuit parameters of the spiral inductors were extracted from the data measured from the spiral inductors fabricated using a 0.18 $\mu\textrm{m}$ RF CMOS process. The metal width, which is a critical design parameter, was optimized for the maximum quality factor with respect to the operating frequency.

• Proceedings of the IEEK Conference
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• 2003.07b
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• pp.987-990
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• 2003

This paper presents a cross-coupled RF VCO with high-Q MEMS-based spiral inductors. Since the use of high-Q inductors is critical to VCO design, MEMS-based spiral inductors with the Q-factor of nearly 22 are used for the RF VCO with an active cascode current source. The RF VCO circuits including spiral inductors have been designed and simulated in GaAs MMIC-MEMS process. The simulation results of the VCO circuits showed the phase noise of -180dBc/Hz at an offset frequency of 500KHz. The RF VCO circuit simulatinon used 2mA DC current and 3.3V supply.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.56 no.11
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• pp.1967-1971
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• 2007

In this paper, we verified basic forms and equivalent circuits of spiral inductors and various kinds of parasitics of equivalent circuits by using HFSS and Nexxim program that were 3-D EM analysis tools, and fabrication on-chip spiral inductors using Hynix's 0.25um 1-poly and 5-metal CMOS process. Comparing with PGS(patterned ground shield) and NPGS(non patterned ground shield) of spiral inductors of 3.5 turn, 4.5 turn and 5.5 turn, etc, the application of PGS could improve maximum Q value by 8-12%.

• Proceedings of the KIEE Conference
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• 2006.07c
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• pp.1301-1302
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• 2006

In this paper, embedded spiral inductors are investigated into the PCB substrate for low cost RF SOP applications. The spiral inductors designed with geometrical variations were simulated, fabricated, measured, and characterized by using 3D EM simulator, 8 layered PCB standard process and HP 8510B network analyzer (or verifying their applicability. The fabricated embedded spiral inductor has inductance of 9.4 nH at 800MHz, maximum quality factor of 64.8 at 1.09GHz and self resonant frequency of 3.93GHz, respectively. As the measured inductances and quality factors are well matched with simulated ones. PCB embedded spiral inductors are promising for advanced electronic systems with various functionality, low cost, small size and volume.

• Journal of information and communication convergence engineering
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• v.4 no.4
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• pp.155-157
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• 2006

This paper presents the thermal technique to improve characteristic of planar spiral inductors. The spiral inductors were fabricated on silicon dioxide/silicon (SiO2/Si) wafer. The thermal treatment was done by annealing processes. The measure results showed a considerable improvement of return loss (Sl1). This thermal treatment seems very promising for enhancing spiral inductors based RF IC's.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.12 no.9
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• pp.4101-4106
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• 2011

In this study, we propose that the structures of 2-layer spiral planar inductors have a lower spiral coil and via increasing inductance in limited possession are and confirm the frequency characteristics. The structures of inductors have Si thickness of $300{\mu}m$, $SiO_2$ thickness of $7{\mu}m$. The width of Cu coils and the space between segments have $20{\mu}m$, respectively. The number of turns of coils have 3. The performance of spiral planar inductors was simulated to frequency characteristics for inductance, quality-factor, SRF(Self- Resonance Frequency) using HFSS. The 2-layer spiral planar inductors have inductance of 3.2nH over the frequency range of 0.8 to 1.8 GHz, quality-factor of maximum 8.2 at 2.5 GHz, SRF of 5.8 GHz. Otherwise, 1-layer spiral planar inductors have inductance of 1.5nH over the frequency range of 0.8 to 1.8 GHz, quality-factor of maximum 18 at 8 GHz, SRF of 19.2 GHz.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2002.07a
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• pp.89-93
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• 2002

In the present paper we suggested a parallel-branch structure of aluminum spiral inductor for the use of RF integrated circuit at 1∼3 GHz. The inductor was implemented on P-type silicon wafer (5∼15 Ω-cm) under the standard CMOS process and it showed a improved quality(Q) factor by more than 10% with no degradation of inductance. The effect of the structure modification on the Q factor and the inductance was scrutinized comparing with those of the conventional spiral inductors.