• JSTS:Journal of Semiconductor Technology and Science
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• v.14 no.6
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• pp.728-732
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• 2014

Macro-model of magnetic tunnel junction (MTJ) for spin transfer torque magnetic random access memory (STT-MRAM) has been developed. The macro-model can describe the dynamic behavior such as the state change of MTJ as a function of the pulse width of driving current and voltage. The statistical behavior has been included in the model to represent the variation of the MTJ characteristic due to process variation. The macro-model has been developed in Verilog-A.

• Journal of Magnetics
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• v.17 no.2
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• pp.73-77
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• 2012

We investigate spin transfer torque (STT) in magnetic multilayer structures using micromagnetic simulations. We implement the STT contribution for magnetic multilayer structures in addition to the Landau-Lifshitz-Gilbert (LLG) micromagnetic simulators. In addition to the Sloncewski STT term, the zero, first, and second order field-like terms are also considered as well as the effects of the Oersted field due to the running current are addressed. We determine the switching current densities of the free layer with the exchange biased synthetic ferrimagnetic reference layers for various cases.

• Journal of Magnetics
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• v.18 no.4
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• pp.380-385
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• 2013

We find a metastable vortex state of the perpendicular magnetic anisotropy free layer in spin transfer torque magnetic tunneling junctions by using micromagnetic simulations. The metastable vortex state does not exist in a single layer, and it is only found in the trilayer structure with the perpendicular magnetic anisotropy polarizer layer. It is revealed that the physical origin is the non-uniform stray field from the polarizer layer.

• Journal of the Korean Magnetics Society
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• v.19 no.1
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• pp.22-27
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• 2009

Reduction of the critical current density ($J_c$) for STT magnetization switching is most important issue of magnetic tunnel junctions (MTJs) based MRAM. This report describes how to decrease the Jc and will introduce the recent research progresses of STT-MRAM devices with material engineering and structural improvement, respectively.

• Proceedings of the Korean Magnestics Society Conference
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• 2015.11a
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• pp.109-110
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• 2015

• Proceedings of the Korean Magnestics Society Conference
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• 2016.05a
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• pp.107-108
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• 2016

• JSTS:Journal of Semiconductor Technology and Science
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• v.16 no.1
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• pp.31-38
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• 2016

A novel self-reference sense amplifier with parallel reading during writing operation is proposed. Read access time is improved compared to conventional self-reference scheme with fast operation speed by reducing operation steps to 1 for read operation cycle using parallel reading scheme, while large sense margin competitive to conventional destructive scheme is obtained by using self-reference scheme. The simulation was performed using standard $0.18{\mu}m$ CMOS process. The proposed self-reference sense amplifier improved not only the operation speed of less than 20 ns which is comparable to non-destructive sense amplifier, but also sense margin over 150 mV which is larger than conventional sensing schemes. The proposed scheme is expected to be very helpful for engineers for developing MRAM technology.

• Journal of the Korean Magnetics Society
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• v.19 no.1
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• pp.35-42
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• 2009

Among the next generation memory, MRAM (Magnetic Random Access Memory) is worthy of notice for substituting the preexisting memory thanks to its non-volatile property and other advantages. Recently perpendicular MRAM and spin transfer torque MRAM techniques are under active investigation to realize a high density and low power consumption. As a result, there are increasing of patents applications for high density, low current density for magnetization switching and high thermal stability. In this paper, we analyze the trend of patent applications and registrations about MRAM and propose a direction of future investigation.

• International Journal of Internet, Broadcasting and Communication
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• v.10 no.4
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• pp.6-11
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• 2018

As embedded memory technology evolves, the traditional Static Random Access Memory (SRAM) technology has reached the end of development. For deepening the manufacturing process technology, the next generation memory technology is highly required because of the exponentially increasing leakage current of SRAM. Non-volatile memories such as STT-MRAM (Spin Torque Transfer Magnetic Random Access Memory), PCM (Phase Change Memory) are good candidates for replacing SRAM technology in embedded memory systems. They have many advanced characteristics in the perspective of power consumption, leakage power, size (density) and latency. Nonetheless, nonvolatile memories have two major problems that hinder their use it the next-generation memory. First, the lifetime of the nonvolatile memory cell is limited by the number of write operations. Next, the write operation consumes more latency and power than the same size of the read operation.These disadvantages can be solved using the compiler. The disadvantage of non-volatile memory is in write operations. Therefore, when the compiler decides the layout of the data, it is solved by optimizing the write operation to allocate a lot of data to the SRAM. This study provides insights into how these compiler and architectural designs can be developed.

• Proceedings of the Korean Magnestics Society Conference
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• 2015.05a
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• pp.78-79
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• 2015

We investigate the switching current for various cell diameters and DM interaction. We find that the current density for switching can depend strongly on the cell size when the switching is governed by the domain wall motion. Moreover the switching current density is also strongly influenced by DM interaction. In the presentation, we will discuss the effect of domain wall formation and more various DMI constant on the switching current desity in detail.