• Title/Summary/Keyword: Solder bump

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A Study on the Optimization of IR Laser Flip-chip Bonding Process Using Taguchi Methods (다구찌법을 이용한 IR 레이저 Flip-chip 접합공정 최적화 연구)

  • Song, Chun-Sam;Ji, Hyun-Sik;Kim, Joo-Han;Kim, Jong-Hyeong;Ahn, Hyo-Sok
    • Journal of Welding and Joining
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    • v.26 no.3
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    • pp.30-36
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    • 2008
  • A flip-chip bonding system using IR laser with a wavelength of 1064 nm was developed and associated process parameters were analyzed using Taguchi methods. An infrared laser beam is designed to transmit through a silicon chip and used for transferring laser energy directly to micro-bumps. This process has several advantages: minimized heat affect zone, fast bonding and good reliability in the microchip bonding interface. Approximately 50 % of the irradiated energy can be directly used for bonding the solder bumps with a few seconds of bonding time. A flip-chip with 120 solder bumps was used for this experiment and the composition of the solder bump was Sn3.0Ag0.5Cu. The main processing parameters for IR laser flip-chip bonding were laser power, scanning speed, a spot size and UBM thickness. Taguchi methods were applied for optimizing these four main processing parameters. The optimized bump shape and its shear force were modeled and the experimental results were compared with them. The analysis results indicate that the bump shape and its shear force are dominantly influenced by laser power and scanning speed over a laser spot size. In addition, various effects of processing parameters for IR laser flip-chip bonding are presented and discussed.

Interfacial Reactions of Sn Solder with Variations of Under-Bump-Metallurgy and Reflow Time (Under Bump Metallurgy의 종류와 리플로우 시간에 따른 Sn 솔더 계면반응)

  • Park, Sun-Hee;Oh, Tae-Sung;Englemann, G.
    • Journal of the Microelectronics and Packaging Society
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    • v.14 no.3
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    • pp.43-49
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    • 2007
  • Thickness of intermetallic compounds and consumption rates of under bump metallurgies (UBMs) were investigated in wafer-level solder bumping with variations of UBM materials and reflow times. In the case of Cu UBM, $0.6\;{\mu}m-thick$ intermetallic compound layer was formed before reflow of Sn solder, and the average thickness of the intermetallic compound layer increased to $4\;{\mu}m$ by reflowing at $250^{\circ}C$ for 450 sec. On the contrary, the intermetallic layer had a thickness of $0.2\;{\mu}m$ on Ni UBM before reflow and it grew to $1.7\;{\mu}m$ thickness with reflowing for 450 sec. While the consumption rates of Cu UBM were 100nm/sec fur 15-sec reflow and 4.50-sec for 450-sec reflow, those of Ni UBM decreased to 28.7 nm/sec for 15-sec reflow and 1.82 nm/sec for 450-sec reflow.

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Formation Mechanisms of Sn Oxide Films on Probe Pins Contacted with Pb-Free Solder Bumps (무연솔더 범프 접촉 탐침 핀의 Sn 산화막 형성 기제)

  • Bae, Kyoo-Sik
    • Korean Journal of Materials Research
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    • v.22 no.10
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    • pp.545-551
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    • 2012
  • In semiconductor manufacturing, the circuit integrity of packaged BGA devices is tested by measuring electrical resistance using test sockets. Test sockets have been reported to often fail earlier than the expected life-time due to high contact resistance. This has been attributed to the formation of Sn oxide films on the Au coating layer of the probe pins loaded on the socket. Similar to contact failure, and known as "fretting", this process widely occurs between two conductive surfaces due to the continual rupture and accumulation of oxide films. However, the failure mechanism at the probe pin differs from fretting. In this study, the microstructural processes and formation mechanisms of Sn oxide films developed on the probe pin surface were investigated. Failure analysis was conducted mainly by FIB-FESEM observations, along with EDX, AES, and XRD analyses. Soft and fresh Sn was found to be transferred repeatedly from the solder bump to the Au surface of the probe pins; it was then instantly oxidized to SnO. The $SnO_2$ phase is a more stable natural oxide, but SnO has been proved to grow on Sn thin film at low temperature (< $150^{\circ}C$). Further oxidation to $SnO_2$ is thought to be limited to 30%. The SnO film grew layer by layer up to 571 nm after testing of 50,500 cycles (1 nm/100 cycle). This resulted in the increase of contact resistance and thus of signal delay between the probe pin and the solder bump.

Effect of Shearing Speed on High Speed Shear Properties of Sn1.0Ag0.5Cu Solder Bump on Various UBM's (다양한 UBM층상의 Sn0Ag0.5Cu 솔더 범프의 고속 전단특성에 미치는 전단속도의 영향)

  • Lee, Wang-Gu;Jung, Jae Pil
    • Korean Journal of Metals and Materials
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    • v.49 no.3
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    • pp.237-242
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    • 2011
  • The effect of shearing speed on the shear force and energy of Sn-0Ag-0.5Cu solder ball was investigated. Various UBM (under bump metallurgy)'s on Cu pads were used such as ENEPIG (Electroless Nickel, Electroless Palladium, Immersion Gold; Ni/Pd/Au), ENIG (Electroless Nickel, Immersion Gold; Ni/Au), OSP (Organic Solderability Preservative). To fabricate a shear test specimen, a solder ball, $300{\mu}m$ in diameter, was soldered on a pad of FR4 PCB (printed circuit board) by a reflow soldering machine at $245^{\circ}C$. The solder bump on the PCB was shear tested by changing the shearing speed from 0.01 m/s to 3.0 m/s. As experimental results, the shear force increased with a shearing speed of up to 0.6 m/s for the ENIG and the OSP pads, and up to 0 m/s for the ENEPIG pad. The shear energy increased with a shearing speed up to 0.3 m/s for the ENIG and the OSP pads, and up to 0.6 m/s for the ENEPIG pad. With a high shear speed of over 0 m/s, the ENEPIG showed a higher shear force and energy than those of the ENIG and OSP. The fracture surfaces of the shear tested specimens were analyzed, and the fracture modes were found to have closer relationship with the shear energy than the shear force.

Reliability of Electroplated Pure Sn Solder Bumps (전해도금으로 형성된 Sn 솔더 범프의 신뢰성)

  • Kim, Yu-Na;Gu, Ja-Myeong;Jeong, Seung-Bu
    • Proceedings of the KWS Conference
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    • 2006.10a
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    • pp.205-206
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    • 2006
  • The microstructural evolutions and shear properties of the pure Sn solder bumps with Ni UBMs were investigated during multiple reflows and high temperature storage(HTS) tests. Only a $Ni_3Sn_4$ IMC was found at the bump/Ni UBM interface after 1 reflow. The layer thickness of these IMCs increased with increasing reflow number and testing time. The solder bumps showed a good reliability during multiple reflows and HTS tests.

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A Study on Pb/63Sn Solder Bumps Formation using a Solder Droplet Jetting Method (Solder Droplet Jetting 방법을 이용한 Pb/63Sn 솔더 범프의 형성에 관한 연구)

  • 손호영;백경욱
    • Proceedings of the International Microelectronics And Packaging Society Conference
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    • 2003.11a
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    • pp.122-127
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    • 2003
  • 본 논문에서는 새로운 솔더 범프 형성 방법 중의 하나인 Solder droplet jetting에 의한 솔더 범프 형성 공정에 대해 연구하였으며, 이를 위해 솔더 제팅 직후의 안정한 솔더 액적(solder droplets)의 형성을 위한 공정 변수들의 영향에 대해 먼저 알아보았다 이를 위해 제팅 노즐에 가해지는 파형과 용융 솔더의 온도, 질소 가스의 압력 등에 의한 영향을 주로 살펴보았다. 다음으로 리플로를 거쳐 솔더 범프를 형성하였으며, 다양한 크기의 솔더 범프를 간단한 방법으로 형성하였다. 또한 무전해 니켈/솔더 계면 반응과 Bump shear test를 통한 기계적 성질을 고찰하는 한편, 계면 반응 결과는 스크린 프린팅에 의해 형성된 솔더 범프의 결과와 비교함으로써, 저가의 공정으로 미세 피치를 갖는 솔더 범프를 형성할 수 있는 Solder droplet jetting 방법이 기존의 방법에 의해 형성된 솔더 범프의 특성과 유사함을 고찰하였다. 마지막으로 실제 칩에 적용 되는 솔더 범프를 형성하여 플립칩 어셈블리 및 전기적 테스트를 수행하여, Solder droplet jetting이 실제 차세대 플립칩용 솔더 범프 형성 방법으로서 적용될 수 있음을 고찰하였다.

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A Study on Bumping of Micoro-Solder for Optical Packaging and Reaction at Solder/UBM interface (광패키징용 마이크로 솔더범프의 형성과 Contact Pad용 UBM간의 계면 반응 특성에 관한 연구)

  • Park, Jong-Hwan;Lee, Jong-Hyun;Kim, Yong-Seog
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2001.11b
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    • pp.332-336
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    • 2001
  • In this study, the reaction at UBM(Under Bump Metallurgy) and solder interface was investigated. The UBM employed in conventional optical packages, Au/Pt/Ti layer, were found to dissolve into molten Au-Sn eutectic solder during reflow soldering. Therefore, the reaction with different diffusion barrier layer such as Fe, Co, Ni were investigated to replace the conventional Pt layer. The reaction behavior was investigated by reflowing the solder on the pad of the metals defined by Cr layer for 1, 2, 3, 4, and 5 minutes at $330^{\circ}C$. Among the metals, Co was found to be most suitable for the diffusion barrier layer as the wettability with the solder was reasonable and the reaction rate of intermetallic formation at the interface is relatively slow.

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A Study on Bumping of Micro-Solder for Optical Packaging and Reaction at Solder/UBM interface (광패키징용 마이크로 솔더범프의 형성과 Contact Pad용 UBM간의 계면 반응 특성에 관한 연구)

  • 박종환;이종현;김용석
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2001.11a
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    • pp.332-336
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    • 2001
  • In this study, the reaction at UBM(Under Bump Metallurgy) and solder interface was investigated. The UBM employed in conventional optical packages, Au/Pt/Ti layer, were found to dissolve into molten Au-Sn eutectic solder during reflow soldering. Therefore, the reaction with different diffusion barrier layer such as Fe, Co, Ni were investigated to replace the conventional R layer. The reaction behavior was investigated by reflowing the solder on the pad of the metals defined by Cr layer for 1, 2, 3, 4, and 5 minutes at 330$^{\circ}C$. Among the metals, Co was found to be most suitable for the diffusion barrier layer as the wettability with the solder was reasonable and the reaction rate of intermetallic formation at the interface is relatively slow.

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Thermo-mechanical Behavior Characteristic Analysis of $B^2it$(Buried Bump Interconnection Technology) in PCB(Printed Circuit Board) (인쇄회로기판 $B^2it$(Buried Bump Interconnection Technology) 구조의 열적-기계적 거동특성 해석)

  • Cho, Seung-Hyun;Chang, Tae-Eun
    • Journal of the Microelectronics and Packaging Society
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    • v.16 no.2
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    • pp.43-50
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    • 2009
  • Although thin PCBs(Printed Circuit Boards) have recently been required for high density interconnection, high electrical performance, and low manufacturing cost, the utilization of thin PCBs is severely limited by warpage and reliability issues. Warpage of the thin PCB leads to failure in solder-joints and chip. The $B^2it$(Buried Bump Interconnection Technology) for PCB has been developed to achieve a competitive manufacturing price. In this study, chip temperature, package warpage, chip stress and solder-joints stress characteristics of the PCB prepared with $B^2it$ process have been calculated using thermo-mechanical coupled analysis by the FEM(Finite Element Method). FEM computation was carried out with the variations in bump shapes and kinds of materials under 1.5W power of chip and constant convection heat transfer. The results show that chip temperature distribution reached more quickly steady-state status with PCB prepared with $B^2it$ process than PCB prepared with conventional via interconnection structure. Although $B^2it$ structures are effective on low package warpage and chip stress, with high strength bump materials arc disadvantage for low stress of solder-joints. Therefore, it is recommended that optimized bump shapes and materials in PCB design should be considered in terms of reliability characteristics in the packaging level.

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