• Applied Chemistry for Engineering
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• v.20 no.6
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• pp.622-627
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• 2009

Using an alkali-solution developable photosensitive resin and a carbon black as a conductive filler, photo-patternable pastes for polymer thick film resistor were fabricated and evaluated. A photo solder resist (PSR), which is usually used as protecting layer of printed circuit board (PCB), was used as a photosensitive resin so that ultraviolet exposure and alkali-aqueous solution development of paste were possible. After fabricating the photosensitive polymer resistor paste, the electrical properties of thick film resistors were measured using PCB test boards. Sheet resistance was decreased with increasing amount of carbon black, but the developability was limited in excess loading of carbon black. The sheet resistance was also reduced by re-curing and the change rate was smaller in higher carbon black loading. Moreover, finely patterned meander-type thick film resistors were fabricated using photo-process and large resistance up to several tens of sheet resistance could be obtained in small area by this technique.

• ETRI Journal
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• v.35 no.6
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• pp.1152-1155
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• 2013

A cost-effective and simple solder on pad (SoP) process is proposed for a fine-pitch microbump interconnection. A novel solder bump maker (SBM) material is applied to form a 60-${\mu}m$ pitch SoP. SBM, which is composed of ternary Sn3.0Ag0.5Cu (SAC305) solder powder and a polymer resin, is a paste material used to perform a fine-pitch SoP through a screen printing method. By optimizing the volumetric ratio of the resin, deoxidizing agent, and SAC305 solder powder, the oxide layers on the solder powder and Cu pads are successfully removed during the bumping process without additional treatment or equipment. Test vehicles with a daisy chain pattern are fabricated to develop the fine-pitch SoP process and evaluate the fine-pitch interconnection. The fabricated Si chip has 6,724 bumps with a 45-${\mu}m$ diameter and 60-${\mu}m$ pitch. The chip is flip chip bonded with a Si substrate using an underfill material with fluxing features. Using the fluxing underfill material is advantageous since it eliminates the flux cleaning process and capillary flow process of the underfill. The optimized bonding process is validated through an electrical characterization of the daisy chain pattern. This work is the first report on a successful operation of a fine-pitch SoP and microbump interconnection using a screen printing process.

• Journal of the Microelectronics and Packaging Society
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• v.25 no.4
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• pp.123-128
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• 2018

Effect of activators in flux on the printability and wettability of a solder paste was evaluated in this study. The activators in this study were dicarboxylic acids, which were oxalic acid (n = 0), malonic acid (n = 1), succinic acid (n = 2), glutaric acid (n = 3), adipic acid (n = 4), and pimelic acid (n = 5). When the solder pastes were observed with a SMT scope, solder with glutaric acid showed clean and shiny surface when it was melted. Slump ratio of the solder pastes was low when the carbon numbers of the dicarboxylic acid were 1-3. Spreadability was high when the carbon number was over 2. Zero cross time of wetting balance test was under 1 sec when the carbon number was over 3. When activator was oxalic acid or malonic acid, zero cross time was over 1 sec and maximum wetting force was low. Fluxes with the oxalic acid and malonic acid showed decomposition at the temperature close to melting point. Among the dicarboxylic acids, glutaric acid provided excellent slump, spreadability, and wettability.

• Electrical & Electronic Materials
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• v.6 no.6
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• pp.505-513
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• 1993

본 논문은 전자 부품의 Soldring기에 사용되는 접합제를 Flux를 포함한 Solder paste 대신에 도금막을 이용하기 위한 Sn 도금막 형성 프로세스를 검토한 것이다. 반도체 Device를 Packaging한 외부단자(lead frame)과 HIC상의 후막전극(Ag/Pd)과의 접합 및 PCB상의 Cu land와의 접합시에는 스크린 프린트에 의한 Solder Paste가 일반적으로 사용되고 있다. 본 논문은 Fluxless Soldering의 한수단으로 도금막을 lead상에 형성시켜 접합 재료로서의 형성 프로세스 및 도금막의 특성과 도금형성 Paramete와의 관련성을 실험적으로 검토한 것으로 전류밀도 200 A/m$^{2}$의 조건으로 형성한 Sn 도금막이 접합용으로 최적조건임을 밝혔다.

• Journal of the Microelectronics and Packaging Society
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• v.8 no.2
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• pp.37-42
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• 2001

The BGA package has been the area array package of choice for several years. Recently, the transition has been to finer pitch configurations called Chip Scale Packages (CSP). Several of these package types are available at 0.5 mm pitch. requiring surface mount assemblers to evaluate and optimize various elements of the assembly process. This presentation describes the issues associated with making the transition from BGA to CSP assembly. Areas addressed will include the accuracy of pick and place equipment, printed wiring board lines and spaces, PWB vias, in-circuit test issues, solder paste printing, moisture related factors, rework and reliability. The transition to 0.5 mm pitch requires careful evaluation of the board design, solder paste selection, stencil design and component placement accuracy. At this pitch, ball and board pad diameters can be as small as 0.25 mm and 0.20 mm respectively. Drilled interstitial vias are no longer possible and higher ball count packages require micro-via board technology. The transition to CSP requires careful evaluation of these issues. Normal paste registration and BGA component tolerances can no longer achieve the required process levels and higher accuracy pick and place machines need to be implemented. This presentation will examine the optimization of these critical assembly operations, contrast the challenges at 0.5 mm and also look at the continuation of the process to incorporate smaller pitch flip chip devices.

• Proceedings of the International Microelectronics And Packaging Society Conference
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• 2001.04a
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• pp.27-34
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• 2001

The BGA Package has been the area array package of choice for several rears. Recently, the transition has been to finer pitch configuration called Chip Scale Packages (CSP). Several of these package types are available at 0.5 mm pitch, requiring surface mount assemblers to evaluate and optimize various elements of the assembly process. This presentation describes the issues associated with making the transition from BGA to CSP assembly. Areas addressed will include the accuracy of pick and piece equipment, printed wiring board lines and spaces, PWB vias, in-circuit test issues, solder paste printing, moisture related factors, rework and reliability. The transition to 0.5 mm pitch requires careful evaluation of the board design, solder paste selection, stencil design and component placement accuracy. At this pitch, ball and board pad diameters can be as small as 0.25 mm and 0.20 mm respectively. Drilled interstitial vias are no longer possible and higher ball count packages require micro-via board technology. The transition to CSP requires careful evaluation of these issues. Normal paste registration and BGA component tolerances can no longer achieve the required process levels and higher accuracy pick and place machines need to be implemented. This presentation will examine the optimization of these critical assembly operations, contrast the challenges at 0.5 mm and also look at the continuation of the process to incorporate smaller pitch flip chip devices.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2008.11a
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• pp.265-266
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• 2008

• Proceedings of the KWS Conference
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• 2007.11a
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• pp.48-50
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• 2007

• Proceedings of the Materials Research Society of Korea Conference
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• 2000.11a
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• pp.147-147
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• 2000

• Proceedings of the International Microelectronics And Packaging Society Conference
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• 2006.10a
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• pp.179-212
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• 2006

1. $Welco^{(R)}$ Ultra fine solder powders are suitable for wafer bumping applications; mass production of ultra fine powders with high quality and high yield. - UFP based pastes for wafer bumping by stencil printing ($60-80{\mu}m$ pitch) are now available - Residue free solder flux was developed; meets voids specification of 20%. - F645 type 5 paste is suitable for components 01005