• Proceedings of the KWS Conference
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• 1995.10a
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• pp.110-112
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• 1995

Initial solder joint strengths of various solder pastes, such as Sn-Pb(63-37wt%), Sn-In(52-48wt%), Sn-In-Ag(77.5-20-2.5wt%), and Sn-Ag(96.5-3.5wt%) has been studied. A system that can control the solder joint interface temperature during bonding process was also desined and implemented to improve solder joint integrity.

• Journal of the Microelectronics and Packaging Society
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• v.11 no.2 s.31
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• pp.23-28
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• 2004

We utilized Ag capping layer for fluxless bonding. To investigate the effect of Ag capping layer, two sets of sample were used. One set was bare In and Sn solders. The other set was In and Sn solders with Ag capping layer. In ($10{\mu}m$) and Sn ($10{\mu}m$) solders were deposited on Cu/Ti/Si substrate using thermal-evaporation, and Ag ($0.1{\mu}m$) capping layers were deposited on In and Sn solders. Solder joints were made by joining two In and Sn deposited specimens at $130^{\circ}C$ for 30 s under 0.8, 1.6, 3.2 MPa using thermal compression bonder. The contact resistance was measured using four-point probe method. The shear strength of the solder joints was measured by the shear test of cross-bar sample in the direction. The microstructure of the solder joints was characterized with SEM and EDS. In and Sn solders without Ag capping layers were only bonded at $130^{\circ}C$ under high bonding pressure. Also the shear strength of the In-Sn solder joints under was lower than that of the Ag/In-Ag/Sn solder joints. The resistance of the solder joints was $2-4\;m{\Omega}$ The solder joints consisted of In-rich phase and Sn-rich phase and the intermixed compounds were found at the interface. As bonding pressure increased, the intermixed compounds formed more.

• Journal of the Korean Society for Precision Engineering
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• v.31 no.10
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• pp.865-871
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• 2014

Paradigm shift to 3-D chip stacking in electronic packaging has induced a lot of integration challenges due to the reduction in wafer thickness and pitch size. This study presents a hybrid bonding technology by self-alignment effect in order to improve the flip chip bonding accuracy with ultra-thin wafer. Optimization of Cu pillar bump formation and evaluation of various factors on self-alignment effect was performed. As a result, highly-improved bonding accuracy of thin wafer with a $50{\mu}m$ of thickness was achieved without solder bridging or bump misalignment by applying reflow process after thermo-compression bonding process. Reflow process caused the inherently-misaligned micro-bump to be aligned due to the interface tension between Si die and solder bump. Control of solder bump volume with respect to the chip dimension was the critical factor for self-alignment effect. This study indicated that bump design for 3D packaging could be tuned for the improvement of micro-bonding quality.

• Journal of Institute of Control, Robotics and Systems
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• v.15 no.9
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• pp.916-921
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• 2009

The technology to inspect and measure an inner structure of micro parts has become an important tool in the semi-conductor industrial field with the development of automation and precision manufacturing. Especially, the inspection skill on the inside of highly integrated electronic device becomes a key role in detecting defects of a completely assembled product. X-ray inspection technology has been focused as a main method to inspect the inside structure. However, there has been insufficient research done on the customized inspection technology for the flip-chip assembly due to the interior connecting part of flip chip which connects the die and PCB electrically through balls positioned on the die. In this study, therefore, it is implemented to detect shape error of flip chip bonding without damaging chips using an x-ray inspection system. At this time, it is able to monitor the solder bump shape by introducing an edge-extracting algorithm (exponential approximation function) according to the attenuating characteristic and detect shape error compared with CAD data. Additionally, the bonding error of solder bumps is automatically detectable by acquiring numerical size information at the extracted solder bump edges.

• Journal of Power Electronics
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• v.16 no.5
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• pp.1843-1850
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• 2016

This study focused on predicting the fatigue life of an insulated gate bipolar transistor (IGBT) power module for electric locomotives. The effects of different wiring technologies, including aluminum wires, copper wires, aluminum ribbons, and copper ribbons, on solder fatigue life were investigated to meet the high power requirement of the IGBT module. The module's temperature distribution and solder fatigue behavior were investigated through coupled electro-thermo-mechanical analysis based on the finite element method. The ribbons attained a chip junction temperature that was 30℃ lower than that attained with conventional round wires. The ribbons also exhibited a lower plastic strain in comparison with the wires. However, the difference in plastic strain and junction temperature among the different ribbon materials was relatively small. The ribbons also exhibited different crack propagation behaviors relative to the wires. For the wires, the cracks initiated at the outmost edge of the solder, whereas for the ribbons, the cracks grew in the solder layer beneath the ribbons. Comparison of fatigue failure areas indicated that ribbon bonding technology could substantially enhance the fatigue life of IGBT modules and be a potential candidate for high power modules.

• Journal of the Microelectronics and Packaging Society
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• v.13 no.2 s.39
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• pp.21-26
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• 2006

We developed a bonding at low temperature using fine pitch Sn and In bumps, and studied the reliability of the fine pitch In-Sn solder joints. The $30{\mu}m$ pitch Sn and In bumps were joined together at $120^{\circ}C$. A non conductive adhesive (NCA) was applied during solder joining. Thermal cycling test ($0^{\circ}C-100^{\circ}C$, 2 cycles/h) of up to 2000 cycles was carried out to evaluate the reliability of the solder joints. The bondability was evaluated by measuring the contact resistance (Rc) of the joints through the four point probe method. As the content of filler increased, the reliability improved in the solder joints during thermal cycling test because the contact resistance increased little. The filler redistributed the stress and strains from the thermal shock over the entire joint area.

• Journal of the Microelectronics and Packaging Society
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• v.15 no.4
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• pp.9-15
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• 2008

Microstructure and contact resistance of the Au-Sn solder joints were characterized after flip-chip bonding of the Au/Sn bumps processed by successive electrodeposition of Au and Sn. Microstructure of the Au-Sn solder joints, formed by flip-chip bonding at $285^{\circ}C$ for 30 sec, was composed of the $Au_5Sn$+AuSn lamellar structure. The interlamellar spacing of the $Au_5Sn$+AuSn structure increased by reflowing at $310^{\circ}C$ for 3 min after flip-chip bonding. While the Au-Sn solder joints formed by flip-chip bonding at $285^{\circ}C$ for 30 sec exhibited an average contact resistance of 15.6 $m{\Omega}$/bump, the Au-Sn solder joints reflowed at $310^{\circ}C$ for 3 min after flip-chip bonding possessed an average contact resistance of 15.0 $m{\Omega}$/bump.

• Journal of Welding and Joining
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• v.26 no.3
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• pp.30-36
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• 2008

A flip-chip bonding system using IR laser with a wavelength of 1064 nm was developed and associated process parameters were analyzed using Taguchi methods. An infrared laser beam is designed to transmit through a silicon chip and used for transferring laser energy directly to micro-bumps. This process has several advantages: minimized heat affect zone, fast bonding and good reliability in the microchip bonding interface. Approximately 50 % of the irradiated energy can be directly used for bonding the solder bumps with a few seconds of bonding time. A flip-chip with 120 solder bumps was used for this experiment and the composition of the solder bump was Sn3.0Ag0.5Cu. The main processing parameters for IR laser flip-chip bonding were laser power, scanning speed, a spot size and UBM thickness. Taguchi methods were applied for optimizing these four main processing parameters. The optimized bump shape and its shear force were modeled and the experimental results were compared with them. The analysis results indicate that the bump shape and its shear force are dominantly influenced by laser power and scanning speed over a laser spot size. In addition, various effects of processing parameters for IR laser flip-chip bonding are presented and discussed.

• Journal of the Microelectronics and Packaging Society
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• v.16 no.2
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• pp.11-19
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• 2009

Thermo-mechanical behaviors of wire-bond plastic ball grid array (WB-PBGA) package assemblies are characterized by high-sensitivity moire interferometry. Using the real-time moire setup, fringe patterns are recorded and analyzed for several temperatures. Experiments are conducted for three types of WB-PBGA package that have full grid pattern and perimeter pattern with/without central connections. Bending deformations of the assemblies and average strains of the solder balls are investigated, with an emphasis on the effect of solder interconnection grid patterns, Thermal strain distributions and the location of the critical solder ball in package assemblies are quite different with the form of solder ball grid pattern. For the WB-PBGA-PC, The largest of effective strain occurred in the inner solder ball of perimeter closest to the chip solder balls. The critical solder ball is located at the edge of the chip for the WB-PBGA-FG, at the most outer solder ball of central connections for the WB-PBGA-P/C, and at the inner solder ball closest to the chip for the WB-PBGA-P.

• Journal of the Microelectronics and Packaging Society
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• v.24 no.1
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• pp.17-25
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• 2017

Recently, research and application for a power module have been actively studied according to the increasing demand for the production of vehicles, smartphones and semiconductor devices. The power modules based on the transient liquid phase (TLP) technology for bonding of power semiconductor devices have been introduced in this paper. The TLP bonding has been widely used in semiconductor packaging industry due to inhibiting conventional Pb-base solder by the regulation of end of life vehicle (ELV) and restriction of hazardous substances (RoHS). In TLP bonding, the melting temperature of a joint layer becomes higher than bonding temperature and it is cost-effective technology than conventional Ag sintering process. In this paper, a variety of TLP bonding technologies and their characteristics for bonding of power module have been described.