• Title/Summary/Keyword: Smart Gate

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A Realization of CNN-based FPGA Chip for AI (Artificial Intelligence) Applications (합성곱 신경망 기반의 인공지능 FPGA 칩 구현)

  • Young Yun
    • Proceedings of the Korean Institute of Navigation and Port Research Conference
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    • 2022.11a
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    • pp.388-389
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    • 2022
  • Recently, AI (Artificial Intelligence) has been applied to various technologies such as automatic driving, robot and smart communication. Currently, AI system is developed by software-based method using tensor flow, and GPU (Graphic Processing Unit) is employed for processing unit. However, if software-based method employing GPU is used for AI applications, there is a problem that we can not change the internal circuit of processing unit. In this method, if high-level jobs are required for AI system, we need high-performance GPU, therefore, we have to change GPU or graphic card to perform the jobs. In this work, we developed a CNN-based FPGA (Field Programmable Gate Array) chip to solve this problem.

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Implementation of Dual-Mode Channel Card for SDR-based Smart Antenna System (SDR기반 스마트 안테나 시스템을 위한 듀얼 모드 채널 카드 구현)

  • Kim, Jong-Eun;Choi, Seung-Won
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.33 no.12A
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    • pp.1172-1176
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    • 2008
  • In this paper, we describe the implementation and performance of a dual-mode Software Define Radio (SDR) smart antenna base station system. SDR technology enables a communication system to be reconfigured through software downloads to the flexible hardware platform that is implemented using programmable devices such as Digital Signal Processors (DSPs), Field Programmable Gate Arrays (FPGAs), and microprocessors. The presented base station channel card comprises the physical layer (pHY) including the baseband modem as well as the beamforming module. This channel card is designed to support TDD High-Speed Downlink Packet Access (HSDPA) as well as Wireless Broadband Portable Internet (WiBro) utilizing the SDR technology. We first describe the operations and functions required in WiBro and TDD HSDPA. Then, we explain the channel card design procedure and hardware implementation. Finally, we evaluate WiBro and TDD HSDPA performance by simulation and actual channel-card-based processing. Our smart antenna base-station dual-mode channel card shows flexibility and tremendous performance gains in terms of communication capacity and cell coverage.

A modified U-net for crack segmentation by Self-Attention-Self-Adaption neuron and random elastic deformation

  • Zhao, Jin;Hu, Fangqiao;Qiao, Weidong;Zhai, Weida;Xu, Yang;Bao, Yuequan;Li, Hui
    • Smart Structures and Systems
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    • v.29 no.1
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    • pp.1-16
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    • 2022
  • Despite recent breakthroughs in deep learning and computer vision fields, the pixel-wise identification of tiny objects in high-resolution images with complex disturbances remains challenging. This study proposes a modified U-net for tiny crack segmentation in real-world steel-box-girder bridges. The modified U-net adopts the common U-net framework and a novel Self-Attention-Self-Adaption (SASA) neuron as the fundamental computing element. The Self-Attention module applies softmax and gate operations to obtain the attention vector. It enables the neuron to focus on the most significant receptive fields when processing large-scale feature maps. The Self-Adaption module consists of a multiplayer perceptron subnet and achieves deeper feature extraction inside a single neuron. For data augmentation, a grid-based crack random elastic deformation (CRED) algorithm is designed to enrich the diversities and irregular shapes of distributed cracks. Grid-based uniform control nodes are first set on both input images and binary labels, random offsets are then employed on these control nodes, and bilinear interpolation is performed for the rest pixels. The proposed SASA neuron and CRED algorithm are simultaneously deployed to train the modified U-net. 200 raw images with a high resolution of 4928 × 3264 are collected, 160 for training and the rest 40 for the test. 512 × 512 patches are generated from the original images by a sliding window with an overlap of 256 as inputs. Results show that the average IoU between the recognized and ground-truth cracks reaches 0.409, which is 29.8% higher than the regular U-net. A five-fold cross-validation study is performed to verify that the proposed method is robust to different training and test images. Ablation experiments further demonstrate the effectiveness of the proposed SASA neuron and CRED algorithm. Promotions of the average IoU individually utilizing the SASA and CRED module add up to the final promotion of the full model, indicating that the SASA and CRED modules contribute to the different stages of model and data in the training process.

An Inherent Zero-Voltage and Zero-Current-Switching Full-Bridge Converter with No Additional Auxiliary Circuits

  • Wang, Jianhua;Ji, Baojian;Wang, Hongbo;Chen, Naifu;You, Jun
    • Journal of Power Electronics
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    • v.15 no.3
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    • pp.610-620
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    • 2015
  • An inherent zero-voltage and zero-current-switching phase-shifted full-bridge converter with reverse-blocking insulated-gate bipolar transistor (IGBT) or non-punch-through IGBT is proposed in this paper. This converter not only ensures that the switches in the lagging leg works at zero-current switching, but also minimizes circulating conduction loss without any additional auxiliary circuits. A 1.2 kW hardware prototype is designed, fabricated, and tested to verify the proposed topology. The control loop design procedures with small-signal models are also presented. A simple, low-cost, and robust democratic current-sharing circuit is also introduced and verified in this study. The proposed converter is a suitable alternative for compact, cost-effective applications with high-voltage input.

The New Smart Power Modules for up to 1kW Motor Drive Application

  • Kwon, Tae-Sung;Yong, Sung-Il
    • Journal of Power Electronics
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    • v.9 no.3
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    • pp.464-471
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    • 2009
  • This paper introduces a new Motion-$SPM^{TM}$ (Smart Power Modules) module in Single In-line Package (SIP), which is a fully optimized intelligent integrated IGBT inverter module for up to 1kW low power motor drive applications. This module offers a sophisticated, integrated solution and tremendous design flexibility. It also takes advantage of pliability for the arrangement of heat-sink due to two types of lead forms. It comes to be realized by employing non-punch-through (NPT) IGBT with a fast recovery diode and highly integrated building block, which features built-in HVICs and a gate driver that offers more simplicity and compactness leading to reduced costs and high reliability of the entire system. This module also provides technical advantages such as the optimized cost effective thermal performances through IMS (Insulated Metal Substrate), the high latch immunity. This paper provides an overall description of the Motion-$SPM^{TM}$ in SIP as well as actual application issues such as electrical characteristics, thermal performance, circuit configurations and power ratings.

Design of Digital Block for LF Antenna Driver (LF 안테나 구동기의 디지털 블록 설계)

  • Sonh, Seung-Il
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.15 no.9
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    • pp.1985-1992
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    • 2011
  • PE(Passive Entry) is an automotive technology which allows a driver to lock and unlock door of vehicle without using smart key buttons personally. PG(Pssive Go) is an automotive technology which offers the ability to start and stop the engine when there is a driver in vehicle with smart key. When these two functions are unified, we call it PEG(Passive Entry/Go). LF(Low Frequency) antenna driver which is one of core technologies in PEG is composed of a digital part which processes commands and an analog part which generates sine waveform. The digital part of antenna driver receives commands from MCU(or ECU), and processes requested commands by MCU, and stores antenna-related driver commands and data on an internal FIFO block. The digital part takes corresponding actions for commands read from FIFO and then transfers modulated LF data to analog part. The analog part generates sine waveform and transmits outside through antenna. The designed digital part for LF antenna driver can acomplish faster LF data transmission than that of conventional product. LF antenna driver can be applicable to the areas such as PEG for automotive and gate opening and closing of building.

A Study on Realization of System in Wireless Location Awareness Technology Using Ubiquitous Active RFID (Active RFID를 이용한 실내 무선 위치 인식 기반 스마트 센서 빌딩 구현에 관한 연구)

  • Jung, Chang Duk
    • Journal of Intelligence and Information Systems
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    • v.12 no.3
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    • pp.83-93
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    • 2006
  • This paper is wireless location awareness technology using RFID. We investigates the Location of the received Signal strength reported by RF Analyses of the data are performed to understand the underlying features of location fingerprints. The system is performed factors the extreme environmental Emit signal, which consists of a unique 5000 Terminals. The Location Service have become very popular in many service industries, purchasing and distribution logistics, industry, manufacturing companies and a parking place. The Technically optimal Solution would be the storage of Intelligence information in the most common form of electronic data-carrying device in use in everyday life is the smart card based upon a contact field (telephone smart card, bank cards). The method of an indoor positioning experiment system is compared using measured Location data and a charge of service. The result of research showed the following: first, to check out the mechanism between benefit of system installation and operation of Active RFID. Second, it contributed on indoor wireless location intelligence system efficiency.

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Estimating Internal Transfer Trips Considering Subway Express Line - Focusing on Smart Card Data Based Network - (지하철 급행노선을 고려한 내부환승 추정방안 - 스마트카드 자료기반 네트워크를 중심으로 -)

  • Lee, Mee Young
    • KSCE Journal of Civil and Environmental Engineering Research
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    • v.39 no.5
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    • pp.613-621
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    • 2019
  • In general, transfer in subway stations is defined as transfer between lines and station transfer. In transfer between lines, passengers change from one subway line to another by utilizing horizontal pedestrian facilities such as transfer passages and pedestrian way. Station transfer appears in the situation that subway lines of enter and exit gate terminals differs from those of boarding and alighting trains and passenger trips utilize both vertical pedestrian facilities such as stair and escalator and horizontal facilities. The hypothesis on these two transfers presupposes that all subway lines are operated by either local train or express in subway network. This means that in a transfer case both local and express trains are operated in the same subway line, as a case of Seoul Metro Line 9, has not been studied. This research proposes a methodology of finding the same line transfer in the Seoul metropolitan subway network built based on the smart card network data by suggesting expanded network concept and a model that passengers choose a theirs minimum time routes.

A Study on the Development of Gear Transmission Error Measurement System and Verification (기어 전달오차 계측 시스템 개발 및 검증에 관한 연구)

  • Moon, Seok-Pyo;Lee, Ju-Yeon;Moon, Sang-Gon;Kim, Su-Chul
    • Journal of the Korean Society of Manufacturing Process Engineers
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    • v.20 no.12
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    • pp.136-144
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    • 2021
  • The purpose of this study was to develop and verify a precision transmission error measurement system for a gear pair. The transmission error measurement system of the gear pair was developed as a measurement unit, signal processing unit, and signal analysis unit. The angular displacement for calculating the transmission error of the gear pair was measured using an encoder. The signal amplification, interpolation, and transmission error calculation of the measured angular displacement were conducted using a field-programmable gate array (FPGA) and a real-time processor. A high-pass filter (HPF) was applied to the calculated transmission error from the real-time processor. The transmission error measurement test was conducted using a gearbox, including the master gear pair. The same test was repeated three times in the clockwise and counterclockwise directions, respectively, according to the load conditions (0 - 200 N·m). The results of the gear transmission error tests showed similar tendencies, thereby confirming the stability of the system. The measured transmission error was verified by comparing it with the transmission error analyzed using commercial software. The verification showed a slight difference in the transmission error between the methods. In a future study, the measurement and analysis method of the developed precision transmission error measurement system in this study may possibly be used for gear design.

Comparative Performance Analysis of High Speed Low Power Area Efficient FIR Adaptive Filter

  • Jaiswal, Manish
    • IEIE Transactions on Smart Processing and Computing
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    • v.3 no.5
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    • pp.267-270
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    • 2014
  • This paper presents the comparative performance of an adaptive FIR filter for a Delayed LMS algorithm. The delayed error signal was used to obtain a Delayed LMS algorithm to allow efficient pipelining for achieving a small critical path and area efficient implementation. This paper presents hardware efficient results (device utilization parameters) and power consumed. The FPGA families (Artix-7, Virtex-7, and Kintex-7) for a low voltage perspective are shown. The synthesis results showed that the artix-7 CMOS family achieves the lowest power consumption of 1.118 mW with 83.18 % device utilization. Different Precision strategies, such as the speed optimization and power optimization, were imposed to achieve these results. The algorithm was implemented using MATLAB (2013b) and synthesized on the Leonardo spectrum.