• The Journal of Korean Institute of Communications and Information Sciences
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• v.41 no.11
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• pp.1574-1579
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• 2016

This paper presents a self-powered sensor-node scheme using a RF wireless power harvesting techniques for improve drone time of flight. Sensor-node that is proposed is turned when two conditions satisfy: The one is input RF ID data from master-node should be same with sensor-node's ID, and the other one is RF wireless power harvesting system is turned on by hysteresis switch. In this paper, master-node's output is 26 dBm at 263 MHz. Maximum RF to DC power conversion efficiency is about 55% at 4-6 dBm input power condition (2 meter from master-node). The maximum RF wireless power harvesting range is about 13 meter form master-node. And power consumption of the sensor-node's load elements such as transmitter, MCU and temperature sensors is approximately average 15 mA at 5.0 V for 10 msec.

• IEIE Transactions on Smart Processing and Computing
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• v.1 no.3
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• pp.161-170
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• 2012

This paper presents an efficient and robust approach for determining the correspondence between unbalanced stereo images. The disparity vectors were used instead of feature points, such as corners, to calculate a correspondence relationship. For a faster and optimal estimation, the vectors were classified into several regions, and the homography of each region was calculated using the RANSAC algorithm. The correspondence image was calculated from the images transformed by each homography. Although it provided good results under normal conditions, it was difficult to obtain reliable results in an unbalanced stereo pair. Therefore, a balancing method is also proposed to minimize the unbalance effects using the histogram specification and structural similarity index. The experimental results showed that the proposed approach outperformed the baseline algorithms with respect to the speed and peak-signal-to-noise ratio. This work can be applied to practical fields including 3D depth map acquisition, fast stereo coding, 2D-to-3D conversion, etc.

• IEIE Transactions on Smart Processing and Computing
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• v.4 no.3
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• pp.189-193
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• 2015

This paper provides the design techniques of a successive approximation register (SAR) type 12b analog-to-digital converter (ADC) for distributed maximum power point tracking (DMPPT) control in a photovoltaic system. Both a top-plate sampling technique and a $V_{CM}$-based switching technique are applied to the 12b capacitor digital-to-analog converter (CDAC). With these techniques, we can implement a 12b SAR ADC with a 10b capacitor array digital-to-analog converter (DAC). To enhance the accuracy of the ADC, a single-to-differential converted DAC is exploited with the dual sampling technique during top-plate sampling. Simulation results show that the proposed ADC can achieve a signal-to-noise plus distortion ratio (SNDR) of 70.8dB, a spurious free dynamic range (SFDR) of 83.3dB and an effective number of bits (ENOB) of 11.5b with bipolar CMOS LDMOD (BCDMOS) $0.35{\mu}m$ technology. Total power consumption is 115uW under a supply voltage of 3.3V at a sampling frequency of 1.25MHz. And the figure of merit (FoM) is 32.68fJ/conversion-step.

• Journal of Digital Contents Society
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• v.15 no.1
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• pp.113-120
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• 2014

In recent years, devices using the smart ponwa IT service is activated, to research how the fusion of two or more devices will be able to be interest in the soybeans. One of them in the mobile sector through the development of network and hardware digital geo-spatial map of the rapid advances being made and the computer, how do you map data to efficiently simulate a 3D environment, providing services through a virtual environment focused on whether be. In this study, augmented reality and GIS (Geographic Information System), SLM (Static LOD Model) that combines augmented reality technology on the basis of the basic concepts and approaches in geographic space and how Augmented Reality Based on this interpretation of the relevant content What to do in the development and utilization has a purpose. In this study, the conventional SLM 3DS model data structure of a data format conversion of the proposed possibilities for analyzing and, SLM model generation and format of the existing three-dimensional visualization tools SLM model format for converting a format to a model function, and visualization features. In addition, 3D virtual model to propose a format for efficiently making.

• IEIE Transactions on Smart Processing and Computing
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• v.4 no.3
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• pp.183-188
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• 2015

A 10-bit 10MS/s low power consumption successive approximation register (SAR) analog-to-digital converter (ADC) using a straightforward capacitive digital-to-analog converter (DAC) is presented in this paper. In the proposed capacitive DAC, switching is always straightforward, and its value is half of the peak-to-peak voltage in each step. Also the most significant bit (MSB) is decided without any switching power consumption. The application of the straightforward switching causes lower power consumption in the structure. The input is sampled at the bottom plate of the capacitor digital-to-analog converter (CDAC) as it provides better linearity and a higher effective number of bits. The comparator applies adaptive power control, which reduces the overall power consumption. The differential prototype SAR ADC was implemented with $0.18{\mu}m$ complementary metal-oxide semiconductor (CMOS) technology and achieves an effective number of bits (ENOB) of 9.49 at a sampling frequency of 10MS/s. The structure consumes 0.522mW from a 1.8V supply. Signal to noise-plus-distortion ratio (SNDR) and spurious free dynamic range (SFDR) are 59.5 dB and 67.1 dB and the figure of merit (FOM) is 95 fJ/conversion-step.

• Smart Structures and Systems
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• v.26 no.5
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• pp.605-617
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• 2020

In this study, the experimental tests for the direct tensile strength measurement of Ultra-High Performance Concrete (UHPC) were numerically modeled by using the discrete element method (circle type element) and Finite Element Method (FEM). The experimental tests used for the laboratory tensile strength measurement is the Compressive-to-Tensile Load Conversion (CTLC) device. In this paper, the failure process including the cracks initiation, propagation and coalescence studied and then the direct tensile strength of the UHPC specimens measured by the novel apparatus i.e., CTLC device. For this purpose, the UHPC member (each containing a central hole) prepared, and situated in the CTLC device which in turn placed in the universal testing machine. The direct tensile strength of the member is measured due to the direct tensile stress which is applied to this specimen by the CTLC device. This novel device transferring the applied compressive load to that of the tensile during the testing process. The UHPC beam specimen of size 150 × 60 × 190 mm and internal hole of 75 × 60 mm was used in this study. The rate of the applied compressive load to CTLC device through the universal testing machine was 0.02 MPa/s. The direct tensile strength of UHPC was found using a new formula based on the present analyses. The numerical simulation given in this study gives the tensile strength and failure behavior of the UHPC very close to those obtained experimentally by the CTLC device implemented in the universal testing machine. The percent variation between experimental results and numerical results was found as nearly 2%. PFC2D simulations of the direct tensile strength measuring specimen and ABAQUS simulation of the tested CTLC specimens both demonstrate the validity and capability of the proposed testing procedure for the direct tensile strength measurement of UHPC specimens.

• Fashion & Textile Research Journal
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• v.14 no.2
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• pp.277-285
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• 2012

This research studied how to develop tight upper sportswear from 3D scan data considering fabric stretch property. Subjects were five Korean men of average figure in their 20's. Scanning was done for ten postures via vitus smart/pro(Techmath LTD). Analyzing from 3D scan data, more than 70% of the upper body surface showed surface change rate under 20%. It was shoulder and under arm side part that showed most noticeable body surface change when moving. A parametric model with convex surface was generated and flattened onto the plane, resulting 2D pattern. The error rate occurring in the process of 3D to 2D conversion was 0.2% for outline and 0.13% for area, respectively. Thirteen kinds of stretchable fabrics in the market were collected for this study. Stretch property was in the range of 16.0~58.2% for wale direction; 23.1~78.4% for course. Based on wear trial test, four fabrics were chosen for making the 1st experimental garment and finally one fabric was chosen for the 2nd one, which was developed applying 4 kinds of crosswise reduction rate on 2D pattern: 0, 5, 10, and 15%. Through wear trial test and garment pressure measurement, experimental garment applied with 10% pattern reduction rate was evaluated as most comfortable and considerable.

• The Journal of the Korea Contents Association
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• v.10 no.10
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• pp.86-93
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• 2010

With the introduction of smart phones, the augmented reality became popular and is increasingly drawing attention. The augmented reality in the mobile devices is becoming an individual area to study. Many applications of the augmented reality have been studied, but there are just a few studies on its combination with artificial intelligence in games. In this study, an artificial intelligence algorithm was proposed, which dynamically converts the state of the 3D agent in the augmented reality environment using the 3-Axis acceleration sensor in the smart phone. To control the state of the agent to which the artificial intelligence is applied, users used to directly enter the data or use markers to detect them. The critical values, which were determined via test, were given to the acceleration sensor to ensure accurate state conversion. In this paper, makerless tracking technology was used to implement the augmented reality, and the state of the agent was dynamically converted using the 3-Axis acceleration seonsor.

• Journal of the Computational Structural Engineering Institute of Korea
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• v.36 no.3
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• pp.147-154
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• 2023

In the case of river facilities, the management of this information differs depending on national and regional rivers, therefore, there is no integrated management in place. There is concern about the loss of facility information owing to the insufficient accumulation of information during their design and construction stages. Additionally, as a result, the utilization level of facility information during the maintenance and operation stages is insufficient. To ensure effective maintenance and operation of river facilities, it is necessary to secure data consistency and increase efficiency by organizing facility information according to a standardized classification system. This study proposes a strategy for implementing the BIM standard classification system in the river sector, considering facility characteristics. The goal is to introduce a BIM information model for 3D-based river facilities, and enable efficient maintenance and operation conversion.

• Journal of Advanced Engineering and Technology
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• v.5 no.4
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• pp.349-353
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• 2012

Recently, Mobile multimedia equipments as smart phone and tablet pc requirement is increasing and this market is also being expanded. These mobile equipments require large multi-media function, so more power consumption is required. For these reasons, the needs of power management IC as switching type dc-dc converter and linear regulator have increased. DC-DC buck converter become more important in power management IC because the operating voltage of VLSI system is very low comparing to lithium-ion battery voltage. There are many people to be concerned about digital DC-DC converter without using external passive device recently. Digital controlled DC-DC converter is essential in mobile application to various external circumstance. This paper proposes the DC-DC Buck Converter using the AVR RISC 8-bit micro-processor control. The designed converter receives the input DC 18-30 [V] and the output voltage of DC-DC Converter changes by the feedback circuit using the A/D conversion function. Duty ratio is adjusted to maintain a constant output voltage 12 [V]. Proposed converter using the micro-processor control was compared to a typical boost converter. As a result, the current loss in the proposed converter was reduced about 10.7%. Input voltage and output voltage can be displayed on the LCD display to see the status of the operation.