• Journal of Power Electronics
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• v.19 no.2
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• pp.403-412
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• 2019

Aiming at the problems of large dv/dt and di/dt in traditional single-ended converters and high electromagnetic interference (EMI) noise levels, a single-ended isolated converter using the secondary resonance technique is proposed in this paper. In the proposed converter, the voltage stress of the main power switch can be reduced and the voltage across the output diode is clamped to the output voltage when compared to the conventional flyback converter. In addition, the peak current stress through the main power switch can be decreased and zero current switching (ZCS) of the output diode can be achieved through the resonance technique. Moreover, the EMI noise coupling path and an equivalent model of the proposed converter topology are presented through the operational principle of the proposed converter. Analysis results indicate that the common mode (CM) EMI noise and the differential mode (DM) EMI noise of such a converter are deduced since the frequency spectra of the equivalent controlled voltage sources and controlled current source are decreased when compared with the traditional flyback converter. Furthermore, appropriate parameter selection of the resonant circuit network can increase the equivalent impedance in the EMI coupling path in the low frequency range, which further reduces the common mode interference. Finally, a simulation model and a 60W experimental prototype of the proposed converter are built and tested. Experimental results verify the theoretical analysis.

• Journal of Power Electronics
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• v.15 no.6
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• pp.1468-1479
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• 2015

Renewable energy resources such as wind and photovoltaic power generation systems demand a high step-up DC-DC converters to convert the low voltage to commercial grid voltage. However, the high step-up converter using a transformer has limitations of high voltage stresses of switches and diodes when the transformer winding ratio increases. Accordingly, conventional studies have been applied to series-connect multioutput converters such as forward-flyback and switched-capacitor flyback to reduce the transformer winding ratio. This paper proposes new single-ended converter topologies of an isolation type and a non-isolation type to improve power efficiency, cost-effectiveness, and output ripple. The first proposal is an isolation-type charge-pump switched-capacitor flyback converter that includes an extreme-ratio isolation switched-capacitor cell with a chargepump circuit. It reduces the transformer winding number and the output ripple, and further improves power efficiency without any cost increase. The next proposal is a non-isolation charge-pump switched-capacitor-flyback tapped-inductor boost converter, which adds a charge-pump-connected flyback circuit to the conventional switched-capacitor boost converter to improve the power efficiency and to reduce the efficiency degradation from the input variation. In this paper, the operation principle of the proposed scheme is presented with the experimental results of the 100 W DC-DC converter for verification.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.06a
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• pp.185-185
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• 2008

This paper describes the broadband SDC (Single-ended to Differential Converter) for Digital Video Broadcasting-Satellite $2^{nd}$ edition (DVB-S2) receiver tuner IC. It is fabricated by using $0.18{\mu}m$ CMOS process. In order to obtain high linearity and low phase mismatch, the broadband SDC (Single-ended to Differential Converter) is designed with current mirror structure and cross-coupled capacitor and current source binding differential structure at VDD. The simulation result of SDC shows IIP3 of 11.9 dBm and IIP2 of 38 dBm. It consumes 5mA current with 2.7V supply voltage.

• Journal of Power Electronics
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• v.13 no.5
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• pp.766-778
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• 2013

The depletion of natural resources and renewable energy sources, such as photovoltaic (PV) energy, has been highlighted for global energy solution. The PV power control unit in the PV power-generation technology requires a high step-up DC-DC converter. The conventional step-up DC-DC converter has low efficiency and limited step-up ratio. To overcome these problems, a novel high step-up DC-DC converter using an isolated switched capacitor cell is proposed. The step-up converter uses the proposed transformer and employs the switched-capacitor cell to enable integration with the boost inductor. The output of the boost converter and isolated switched-capacitor cell are connected in series to obtain high step-up with low turn-on ratio. A hardware prototype with 30 V to 40 V input voltage and 340 V output voltage is implemented to verify the performance of the proposed converter. As an extended version, another novel high step-up isolated switched-capacitor single-ended DC-DC converter integrated with a tapped-inductor (TI) boost converter is proposed. The TI boost converter and isolated-switched-capacitor outputs are connected in series to achieve high step-up. All magnetic components are integrated in a single magnetic core to lower costs. A prototype hardware with 20 V to 40 V input voltage, 340 V output voltage, and 100 W output power is implemented to verify the performance of the proposed converter.

• Journal of IKEEE
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• v.24 no.3
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• pp.719-726
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• 2020

A threshold-voltage sensing circuit is proposed to compensate for pixel aging in active matrix organic light-emitting diodes. The proposed threshold-voltage sensing circuit consists of sample-hold (S/H) circuits and a single-ended successive approximation register (SAR) analog-to-digital converter (ADC) with a resolution of 10 bits. To remove a scale down converter of each S/H circuit and a voltage gain amplifier with a signl-to-differentail converter, the middle reference voltage calibration and input range calibration for the single-ended SAR ADC are performed in the capacitor digital-to-analog converter and reference driver. The proposed threshold-voltage sensing circuit is designed by using a 180-nm CMOS process with a supply voltage of 1.8 V. The ENOB and power consimption of the single-ended SAR ADC are 9.425 bit and 2.83 mW, respectively.

• Journal of Power Electronics
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• v.15 no.1
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• pp.39-53
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• 2015

This paper presents the regulation of the output voltage and inductor currents in a Single Ended Primary Inductor Converter (SEPIC), operating in the continuous conduction mode (CCM) using a sliding mode controller. Owing to the time varying nature of the SEPIC converter, designing a feedback controller is a challenging task. In order to improve the dynamic performance of the SEPIC, a Sliding Mode Controller (SMC) is developed. The developed SMC is designed by using a state space average model. The performance of the developed controller with the SEPIC converter is validated at different working conditions through Matlab simulations. It is also compared with the performance while using a PI controller. The results show that the designed controller gives very good output voltage regulation under different operating conditions such as a varying input voltage, changes in the load and component variations. A 48V, 46W experimental setup for has been developed in an analog platform to validate the performance of the proposed SMC.

• Journal of Power Electronics
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• v.16 no.2
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• pp.447-454
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• 2016

A single-ended primary-inductor converter (SEPIC) features low input current ripple and output voltage up/down capability. However, the switching devices in a two-level SEPIC suffer from high voltage stresses and switching losses. To cope with this drawback, this study proposes a three-level SEPIC that uses a low voltage-rated switch and thus achieves better switching performance compared with the two-level SEPIC. The three-level SEPIC can reduce switch voltage stresses and switching losses. The converter operation and control method are described in this work. The experimental results for a 500 W prototype converter are also discussed. Experimental results show that unlike the two-level SEPIC, the three-level SEPIC achieves improved power efficiency with balanced capacitor voltages.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.21 no.8
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• pp.719-726
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• 2008

In this paper, we designed driving IC for 500 V resonant half-bridge type power converter, In this single-ended level shifter, chip area and power dissipation was decreased by 50% and 23.5% each compared to the conventional dual-ended level shifter. Also, this newly designed circuit solved the biggest problem of conventional flip-flop type level shifter in which the power MOSFET were turned on simultaneously due to the large dv/dt noise. The proposed high side level shifter included switching noise protection circuit and schmmit trigger to minimize the effect of displacement current flowing through LDMOS of level shifter when power MOSFET is operating. The designing process was proved reasonable by conducting Spectre and PSpice simulation on this circuit using 1${\mu}m$ BCD process parameter.

• Journal of Power Electronics
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• v.15 no.2
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• pp.327-337
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• 2015

This study discusses the design of a parallel-operated DC-DC single-ended primary-inductor converter (SEPIC) for low-voltage application and current sharing with a constant output voltage. A coupled inductor is used for parallel-connected SEPIC topology. Generally, two separate inductors require different ripple currents, but a coupled inductor has the advantage of using the same ripple current. Furthermore, tightly coupled inductors require only half of the ripple current that separate inductors use. In this proposed work, tightly coupled inductors are used. These produce an output that is more efficient than that from separate inductors. Two SEPICs are also connected in parallel using the coupled inductors with a single common controller. An analog control circuit is designed to generate pulse width modulation (PWM) signals and to fulfill the closed-loop control function. A stable output current-sharing strategy is proposed in this system. An experimental setup is developed for a 18.5 V, 60 W parallel SEPIC (PSEPIC) converter, and the results are verified. Results indicate that the PSEPIC provides good response for the variation of input voltage and sudden change in load.

• The Transactions of the Korean Institute of Power Electronics
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• v.21 no.3
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• pp.224-230
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• 2016

In this study, a single-power-conversion series-resonant ac-dc converter with high efficiency and high power factor is proposed. The proposed ac-dc converter consists of single-ended primary-inductor converter with an active-clamp circuit and a voltage doubler with series-resonant circuit. The active-clamp circuit clamps the surge voltage and provides zero-voltage switching of the main switch. The series-resonant circuit consists of leakage inductance $L_{lk}$ of the transformer and resonant capacitors $ C_{r1}$ and $ C_{r2}$. This circuit also provides zero-current switching of output diodes $D_1$ and $D_2$. Thus, the switching loss of switches and reverse-recovery loss of output diodes are considerably reduced. The proposed ac-dc converter also achieves high power factor using the proposed control algorithm without the addition of a power factor correction circuit and a dc-link electrolytic capacitor. A detailed theoretical analysis and the experimental results for a 1kW prototype are discussed.