• 제목/요약/키워드: Single Window

검색결과 364건 처리시간 0.025초

청각 주파수 응답에 기반한 자동 모음 개시 지점 탐지 (Automatic Vowel Onset Point Detection Based on Auditory Frequency Response)

  • 장한;김학태;정길도
    • 한국산학기술학회논문지
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    • 제13권1호
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    • pp.333-342
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    • 2012
  • 이 논문에서는 인간 청각 시스템에 기반한 모음 개시 지점 (VOP) 탐지 방법을 제시하였다. 이 방법을 통해 '지각의' 주파수 범위, 즉 선형 음향 주파수에서의 Mel Scale을 보여준 후 일련의 삼각 Mel-weighted Filter Bank를 만들어 인간의 청각 시스템에서 대역 필터링 기능을 시뮬레이션하였다. 이러한 비선형 임계 대역 Filter Bank는 데이터 차원수를 크게 감소시키고 비선형적으로 간격을 둔 Mel 스펙트럼에서 더욱 효과적으로 포먼트를 생성하기 위해 조파들의 영향을 제거해준다. Mel 스펙트럼의 첨두 에너지 합은 각 프레임의 특징으로 추출하고 에너지 진폭이 급격히 상승하기 시작할 때의 특성은 Gabor 윈도우를 사용하여 VOP로 탐지한다. 실험 결과를 통해서 다른 종류의 자음들과 연결된 12개의 모음들을 포함하는 한 단어 데이터베이스에 대한 제안된 방법의 평균 정확도는 단시간 에너지와 zero-crossing 비율에 기반을 둔 다른 모음 탐지 방법들보다 높은 72.73% 이상임을 확인하였다.

DC reactive sputtering 증착법을 이용한 초전도테이프의 $Y_2O_3$ 단일완충층 증착 ($Y_2O_3$ single buffer layer deposition using DC reactive sputtering for the superconducting coated conductor)

  • 김호섭;고락길;오상수;김태형;송규정;하홍수;양주생;박유미
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2005년도 하계학술대회 논문집 Vol.6
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    • pp.52-53
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    • 2005
  • $Y_2O_3$ film was directly deposited on Ni-3at%W substrate using DC reactive sputtering technique. Metallic yttrium was used for DC sputtering target and water vapor was used for oxidizing the deposited metallic Yttrium atoms on the substrate. The window of the water vapor turned out to be broad. The minimum partial pressure of water vapor was determined by sufficient oxidation of the $Y_2O_3$ film, and the maximum partial pressure of water vapor was determined by the non-oxidation of the target surface. As the sputtering power was increased, The deposition rate increased without narrowing the window. The fabricated $Y_2O_3$ films showed good texture qualities and surface morphologies. The YBCO film deposited directly on the $Y_2O_3$ buffered Ni-3at%W substrate showed $T_c$, $I_c$ (77 K, self field), and $J_c$ (77 K, self field) of 89 K, 64 A/cm and 1.l $MA/cm^2$, respectively.

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Development of a user-friendly training software for pharmacokinetic concepts and models

  • Han, Seunghoon;Lim, Byounghee;Lee, Hyemi;Bae, Soo Hyun
    • Translational and Clinical Pharmacology
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    • 제26권4호
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    • pp.166-171
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    • 2018
  • Although there are many commercially available training software programs for pharmacokinetics, they lack flexibility and convenience. In this study, we develop simulation software to facilitate pharmacokinetics education. General formulas for time courses of drug concentrations after single and multiple dosing were used to build source code that allows users to simulate situations tailored to their learning objectives. A mathematical relationship for a 1-compartment model was implemented in the form of differential equations. The concept of population pharmacokinetics was also taken into consideration for further applications. The source code was written using R. For the convenience of users, two types of software were developed: a web-based simulator and a standalone-type application. The application was built in the JAVA language. We used the JAVA/R Interface library and the 'eval()' method from JAVA for the R/JAVA interface. The final product has an input window that includes fields for parameter values, dosing regimen, and population pharmacokinetics options. When a simulation is performed, the resulting drug concentration time course is shown in the output window. The simulation results are obtained within 1 minute even if the population pharmacokinetics option is selected and many parameters are considered, and the user can therefore quickly learn a variety of situations. Such software is an excellent candidate for development as an open tool intended for wide use in Korea. Pharmacokinetics experts will be able to use this tool to teach various audiences, including undergraduates.

유도성 벽을 이용한 $\pi$ 분기형 일층구조 급전도파관 어레이의 설계 (Design for a Single-layer Feeder Waveguide Array using $\pi$-Junctions with the Inductive Wall)

  • 민경식;김광욱;김동철;임학규
    • 한국전자파학회논문지
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    • 제12권2호
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    • pp.257-267
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    • 2001
  • 본 논문은 유도성 벽을 이용한 $\pi$분기형 일층구조 급전도파관 어레이 설계에 대하여 기술하고 있다. 이 구조는 복사도파관과 급전도파관을 같은 층에 위치시킴으로써 전체 구조를 일층구조로 만들었으며, 유도성 벽을 이용함으로써 하나의 도파관 창으로부터 복사도파관으로 급전부의 전력분배를 동위상. 동진폭으로 분배되도록 설계하였다. Galerkin's 모멘트법을 이용하여 유동성 벽을 포함한 다단성 급전도파관을 엄밀하게 해석하였고, 설계에 있어서 전송선로형 등가회로 기념을 이용하여 전력분배비와 반사계수를 구하였다. $\pi$결합분기기 한 단에 대해 시뮬레이션하고 그 값을 토대로 하여 실제 제작을 통해 그 타당성을 입증하였고, 한 단에 대한 설계 방법을 토대로 반복 계산에 의한 설계 주파수 3.95GHz을 중심으로 하는 8-port 어레이 급전구조를 설계하였다.

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커튼월 스팬드럴용 진공유리의 열파손에 대한 비교실험 (A Comparative Experiment on Thermal Stress Failure of Vacuum Glazing applied in Curtain Wall at Spandrel area)

  • 김승철;윤종호;신우철;안정혁
    • KIEAE Journal
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    • 제16권3호
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    • pp.121-128
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    • 2016
  • Purpose: The vacuum glazing should constantly retain the gap in vacuum state to maintain high thermal performance. To do so, pillars are used to prevent the glazing from clinging to each other by the atmospheric pressure and therefore surface of the vacuum glazing is consistently affected by residual stress. The vacuum glazing could be applied to curtain wall systems at spandrel area to fulfill a rigorous domestic standard on U-value of the external wall. However, this can lead to high glazing temperature increase by heat concentration at a back panel and finally thermal stress breakage. This study experimentally determined weakness of the vacuum glazing systems on the thermal stress breakage and investigated effect of the residual stress. Method: The experiment first built two scale-down mock-up facilities that replicate the spandrel area in curtain wall, and then installed single low-e glass and vacuum glazing respectively. The two mock-up facilities were exposed to outside to induce the thermal stress breakage. Result: The experiment showed that the temperature occurred the thermal stress breakage was $114.4^{\circ}C$ for the single low-e glass and $118.9^{\circ}C$ for the vacuum glazing respectively. The result also showed the vacuum glazing reached the critical point earlier than the single low-e glass, which means that the vacuum glazing has high potential to occur the thermal shock breakage. In addition, the small temperature difference between two glazing indicates that the residual stress scarcely affects breakage of the vacuum glazing.

A Materials Approach to Resistive Switching Memory Oxides

  • Hasan, M.;Dong, R.;Lee, D.S.;Seong, D.J.;Choi, H.J.;Pyun, M.B.;Hwang, H.
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제8권1호
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    • pp.66-79
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    • 2008
  • Several oxides have recently been reported to have resistance-switching characteristics for nonvolatile memory (NVM) applications. Both binary and ternary oxides demonstrated great potential as resistive-switching memory elements. However, the switching mechanisms have not yet been clearly understood, and the uniformity and reproducibility of devices have not been sufficient for gigabit-NVM applications. The primary requirements for oxides in memory applications are scalability, fast switching speed, good memory retention, a reasonable resistive window, and constant working voltage. In this paper, we discuss several materials that are resistive-switching elements and also focus on their switching mechanisms. We evaluated non-stoichiometric polycrystalline oxides ($Nb_2O_5$, and $ZrO_x$) and subsequently the resistive switching of $Cu_xO$ and heavily Cu-doped $MoO_x$ film for their compatibility with modem transistor-process cycles. Single-crystalline Nb-doped $SrTiO_3$ (NbSTO) was also investigated, and we found a Pt/single-crystal NbSTO Schottky junction had excellent memory characteristics. Epitaxial NbSTO film was grown on an Si substrate using conducting TiN as a buffer layer to introduce single-crystal NbSTO into the CMOS process and preserve its excellent electrical characteristics.

Single-Electron Logic Cells and SET/FET Hybrid Integrated Circuits

  • Kim, S.J.;Lee, C.K.;Lee, J.U.;Choi, S.J.;Hwang, J.H.;Lee, S.E.;Choi, J.B.;Park, K.S.;Lee, W.H.;Paik, I.B.;Kang, J.S.
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제6권1호
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    • pp.52-58
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    • 2006
  • Single-electron transistor (SET)-based logic cells and SET/FET hybrid integrated circuits have been fabricated on SOI chips. The input-output voltage transfer characteristic of the SET-based complementary logic cell shows an inverting behavior where the output voltage gain is estimated to be about 1.2 at 4.2K. The SET/FET output driver, consisting of one SET and three FETs, yields a high voltage gain of 13 and power amplification with a wide-range output window for driving next circuit. Finally, the SET/FET literal gate for a multi-valued logic cell, comprising of an SET, an FET and a constant-current load, displays a periodic voltage output of high/low level multiple switching with a swing as high as 200mV. The multiple switching functionality of all the fabricated logic circuits could be enhanced by utilizing a side gate incorporated to each SET component to enable the phase control of Coulomb oscillations, which is one of the unique characteristics of the SET-based logic circuits.

박스형 이중외피와 커튼월의 냉방기 열적성능에 관한 비교실험 연구 (A Comparative Experimental Study on Thermal Performance of Box-typed Double Skin and Curtain Wall in Cooling Period)

  • 박창영;이건호;윤용상;최창호
    • 한국태양에너지학회 논문집
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    • 제27권2호
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    • pp.111-119
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    • 2007
  • The annual mean temperature of South Korea has risen by $1.3^{\circ}C$ for last 100 years by urbanization and industrialization. Especially, the frequency of unusual hot weather in summer increases for a long time and the frequency of unusual cold weather in winter clearly decreases. In recently, The considerable portion of curtain wall system is appled to building skin in domestic. As related to this, the Korea Institute of Construction Technology devised the box typed double skin facade(It is occasionally called as FDFS : Functional Double Facade System) as an alternative that reflects the distinctive local climate and saves cooling energy. Two mock-ups($49m^*4.9m$) applied to single skin(curtain wall) and double skin each were monitored under the outdoor condition. Therefore, the characteristics of natural ventilation and cooling energy consumption of each window had been analyzed in real time. The results of this study are summarized as follow, Analysis of the experiment on an air conditioner: the indoor temperature of the chamber with FDFS is lower than that of the chamber with single skin facades by $3{\sim}6$ degrees(C). A temperature variation of about $1{\sim}2$ degrees between the 0.2m and 1.7m height of the mock-up occurs in FDFS, while that of about maximum 7 degrees occurs in single skin facade at noon with abundant intensity of solar accident. Also, 67 percent of energy consumption for air conditioning has been saved.

주파수 상향변환 검출기를 이용한 1.5 ㎛ 통신파장대역의 단일광자 측정 (Single-photon Detection at 1.5 ㎛ Telecommunication Wavelengths Using a Frequency up-conversion Detector)

  • 김헌오;윤천주;조석범;김용수
    • 한국광학회지
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    • 제22권5호
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    • pp.223-229
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    • 2011
  • 1.5 ${\mu}m$ 통신파장 대역 단일광자의 효율적인 측정을 위해서 PPLN WG(periodically poled $LiNbO_3$ waveguide)에서 준위상정합을 이용한 합주파수 생성에 의한 주파수 상향변환 검출기를 구성하고 검출 효율, 잡음 계수 및 타이밍 지터를 측정하였다. 974 nm에서 발진하는 펌프광의 세기가 300 mW일 때 최대 검출효율이 약 7%, 잡음 계수율은 약 480 kHz로 측정되었다. 피코초펄스 레이저를 이용한 자발적 매개하향변환에서 발생한 펄스형 단일광자 신호를 이용하여 측정된 주파수 상향변환 검출기의 최소 타이밍 지터는 약 39.1 ps였다. 또한 아주 좁은 동시계수 시간 폭으로 펄스형의 주파수 상향변환된 단일광자를 측정하면 잡음의 효과를 최소화할 수 있고, 신호대 잡음비의 특성을 최대로 높일 수 있다.

나노급 Ir 삽입 니켈실리사이드의 미세구조 분석 (Microstructure Characterization for Nano-thick Ir-inserted Nickel Silicides)

  • 송오성;윤기정;이태헌;김문제
    • 한국재료학회지
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    • 제17권4호
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    • pp.207-214
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    • 2007
  • We fabricated thermally-evaporated 10 -Ni/(poly)Si and 10 -Ni/1 -Ir/(poly)Si structures to investigate the microstructure of nickel monosilicide at the elevated temperatures required for annealing. Silicides underwent rapid at the temperatures of 300-1200 for 40 seconds. Silicides suitable for the salicide process formed on top of both the single crystal silicon actives and the polycrystalline silicon gates. A four-point tester was used to investigate the sheet resistances. A transmission electron microscope(TEM) and an Auger depth profile scope were employed for the determination of vertical section structure and thickness. Nickel silicides with iridium on single crystal silicon actives and polycrystalline silicon gates shoed low resistance up to 1000 and 800, respectively, while the conventional nickle monosilicide showed low resistance below 700. Through TEM analysis, we confirmed that a uniform, 20 -thick silicide layer formed on the single-crystal silicon substrate for the Ir-inserted case while a non-uniform, agglomerated layer was observed for the conventional nickel silicide. On the polycrystalline silicon substrate, we confirmed that the conventional nickel silicide showed a unique silicon-silicide mixing at the high silicidation temperature of 1000. Auger depth profile analysis also supports the presence of thismixed microstructure. Our result implies that our newly proposed iridium-added NiSi process may widen the thermal process window for the salicide process and be suitable for nano-thick silicides.