• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 1992년도 추계학술대회 논문집
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• pp.14-17
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• 1992

To analyze Nonvolatile SNOSFET(polySilicon-Nitride-Oxide-Semiconductor Field Effect Transistor) memory device, two dimensional numerical computer simulation program was developed. The equation discretization was performed by the Finite difference method and the solution was derived by the Iteration method. The doping profile of n-channel device which was fabricated by 1Mbit CMOS process was observed. The electrical potential and the carrier concentration distribution to applied bias condition were observed in the inner of a device. As a result of the write and the erase to memory charge quantity, the threshold voltage shift is expected. Therefore, without device fabrication, the operating characteristics of the device was observed under various the processing and the operating condition.

• 전자공학회논문지A
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• 제31A권1호
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• pp.39-47
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• 1994

The drain current reduction effect due to the side-gating phenomena resulted from interaction between the neighbor gates is lead to degradation of circuit performance. In this paper, these effect were modelized for circuit simulation with the shift of threshold voltage resulting from negative charge formation and the analysis of substrate leakage current resulting trapping effect. To remove dificiencies of the conventional three terminal structure, these model were implemented in SPICE with the four terminal structure, and then the constructed environment enables the simulation of circuit performance degradation resulted from side-gating effect. The validity of implemented model is proved by comparisoin with experiment data.

• Journal of Astronomy and Space Sciences
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• 제18권1호
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• pp.71-80
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• 2001

KITSAT-1에 탑재된 Total Dose Experiment (TDE)로 부터 관측된 RADFET의 문턱전압 변화를 원자력 연구소 조사실의 Co-60 감마선 조사 장치를 이용한 보정 실험을 통해 총 방사능양으로 환산하였다. 위성 내 센서의 위치에 따라 측정되는 총 방사능양이 다르게 나타났으며, 지구 자기권에서의 NASA 방사선 모델을 이용한 시뮬레이션을 통해 이러한 차이가 센서 위치에 따라 위성체에 의한 차폐 효과가 다르기 때문에 나타나는 현상임을 확인하였다.

• JSTS:Journal of Semiconductor Technology and Science
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• 제14권4호
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• pp.451-456
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• 2014

A compact model of a depletion-mode silicon-nanowire (Si-NW) pH sensor is proposed. This drain current model is obtained from the Pao-Sah integral and the continuous charge-based model, which is derived by applying the parabolic potential approximation to the Poisson's equation in the cylindrical coordinate system. The threshold-voltage shift in the drain-current model is obtained by solving the nonlinear Poisson-Boltzmann equation for the electrolyte. The simulation results obtained from the proposed drain-current model for the Si-NW field-effect transistor (SiNWFET) agree well with those of the three-dimensional (3D) device simulation, and those from the Si-NW pH sensor model also agree with the experimental data.

• JSTS:Journal of Semiconductor Technology and Science
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• 제14권5호
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• pp.682-687
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• 2014

We have performed reverse gate bias stress tests on AlGaN/GaN-on-Si Heterostructure FETs (HFETs). The shift of threshold voltage ($V_{th}$) and the reduction of on-current were observed from the stressed devices. These changes of the device parameters were not permanent. We investigated the temporary behavior of the stressed devices by analyzing the temperature dependence of the instabilities and TCAD simulation. As the baseline temperature of the electrical stress tests increased, the changes of the $V_{th}$ and the on-current were decreased. The on-current reduction was caused by the positive shift of the $V_{th}$ and the increased resistance of the gate-to-source and the gate-to-drain access region. Our experimental results suggest that electron-trapping effect into the shallow traps in devices is the main cause of observed instabilities.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2005년도 International Meeting on Information Displayvol.II
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• pp.1297-1300
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• 2005

We propose a new pixel design for active matrix organic light emitting diode (AM-OLED) displays using hydrogenated amorphous silicon thin-film transistors (a-Si:H TFTs). The pixel circuit is composed of five TFTs and one capacitor, and employs only one additional control signal line. It is verified by SPICE simulation results that the proposed pixel compensates the threshold voltage shift of the a-Si:H TFTs and OLED.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2008년도 International Meeting on Information Display
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• pp.197-200
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• 2008

We propose a novel n-type a-Si:H TFT pixel circuit which is proper to AMOLED display for the large size and high resolution. Proposed pixel circuit will be suit to panel for the high resolution because of different threshold sampling method. Driving method of proposed pixel circuit is very simple like an AMLCD. Our simulation indicates that the proposed pixel circuit can compensate the Vth shift and IR rising of power line so that provide better quality image.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2016년도 제50회 동계 정기학술대회 초록집
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• pp.289.2-289.2
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• 2016

In-Ga-Zn-O(IGZO) receive great attention as a channel material for thin film transistors(TFTs) as next-generation display panel backplanes due to its superior electrical and physical properties such as a high mobility, low off-current, high sub-threshold slope, flexibility, and optical transparency. For the purpose of fabricating high performance IGZO TFTs, a thermal recovery process above a temperature of $300^{\circ}C$ is required for recovery or rearrangement of the ionic bonding structure. However diffused metal atoms from source/drain(S/D) electrodes increase the channel conductivity through the oxidation of diffused atoms and reduction of $In_2O_3$ during the thermal recovery process. Threshold voltage ($V_{TH}$) shift, one of the electrical instability, restricts actual applications of IGZO TFTs. Therefore, additional investigation of the electrical stability of IGZO TFTs is required. In this paper, we demonstrate the effect of Ti diffusion and modulation of interface traps by carrying out an annealing process on IGZO. In order to investigate the effect of diffused Ti atoms from the S/D electrode, we use secondary ion mass spectroscopy (SIMS), X-ray photoelectron spectroscopy, HSC chemistry simulation, and electrical measurements. By thermal annealing process, we demonstrate VTH shift as a function of the channel length and the gate stress. Furthermore, we enhance the electrical stability of the IGZO TFTs through a second thermal annealing process performed at temperature $50^{\circ}C$ lower than the first annealing step to diffuse Ti atoms in the lateral direction with minimal effects on the channel conductivity.

• Transactions on Electrical and Electronic Materials
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• 제14권3호
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• pp.139-142
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• 2013

Silicon nanowire (SiNW) silicon-oxide-nitride-oxide-silicon (SONOS) flash memory devices were fabricated and their electrical characteristics were analyzed. Compared to planar SONOS devices, these SiNW SONOS devices have good program/erase (P/E) characteristics and a large threshold voltage ($V_T$) shift of 2.5 V in 1ms using a gate pulse of +14 V. The devices also show excellent immunity to short channel effects (SCEs) due to enhanced gate controllability, which becomes more apparent as the nanowire width decreases. This is attributed to the fully depleted mode operation as the nanowire becomes narrower. 3D TCAD simulations of both devices show that the electric field of the junction area is significantly reduced in the SiNW structure.

• JSTS:Journal of Semiconductor Technology and Science
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• 제15권5호
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• pp.526-532
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• 2015

We quantitatively investigated instability mechanisms under simultaneous positive gate and drain bias stress (SPGDBS) in self-aligned top-gate amorphous indium-zinc-oxide thin-film transistors. After SPGDBS ($V_{GS}=13V$and $V_{DS}=13V$), the parallel shift of the transfer curve into a negative $V_{GS}$ direction and the increase of on current were observed. In order to quantitatively analyze mechanisms of the SPGDBS-induced negative shift of threshold voltage (${\Delta}V_T$), we experimentally extracted the density-of-state, and then analyzed by comparing and combining measurement data and TCAD simulation. As results, 19% and 81% of ${\Delta}V_T$ were taken to the donor-state creation and the hole trapping, respectively. This donor-state seems to be doubly ionized oxygen vacancy ($V{_O}^{2+}$). In addition, it was also confirmed that the wider channel width corresponds with more negative ${\Delta}V_T$. It means that both the donor-state creation and hole trapping can be enhanced due to the increase in self-heating as the width becomes wider. Lastly, all analyzed results were verified by reproducing transfer curves through TCAD simulation.