• Journal of the Microelectronics and Packaging Society
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• v.10 no.2
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• pp.7-12
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• 2003

The $Bi_{3.3}La_{0.7}O_{12}$(BLT) capacitors with Metal-Ferroelectric-Insulator-Silicon structure were prepared on $SiO_2/Si$ substrates by using sol-gel method. The BLT thin films annealed at $650^{\circ}C$ and $700^{\circ}C$ showed randomly oriented perovskite crystalline structures. The full with at half maximum (FWHM) of the (117) main peak was decreased from $0.65^{\circ}$ to $0.53^{\circ}$ with increasing the annealing temperature from $650^{\circ}C$ to $700^{\circ}C$, indicating the improvement in the crystalline quality of the film. In addition, the grain size and $R_rms$ , values were increased with increasing the annealing temperatures, showing the rough film surface at higher annealing temperatures. From the capacitance-voltage (C-V) measurements, the memory window voltage of the BLT film annealed at $700^{\circ}C$ was found to be about 0.7 V at an applied voltage of 5 V. The leakage current density of the BLT film annealed at $700^{\circ}C$ was about $3.1{\times}10^{-8}A/cm^2$.

• Smart Structures and Systems
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• v.6 no.3
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• pp.225-238
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• 2010

We report on the development of a new technology for the fabrication of Micro-Electro-Mechanical-System (MEMS) strain sensors to realize a novel type of crackmeter for health monitoring of ageing civil infrastructures. The fabrication of micromachined silicon MEMS sensors based on a Silicon On Insulator (SOI) technology, designed according to a Double Ended Tuning Fork (DETF) geometry is presented, using a novel process which includes a gap narrowing procedure suitable to fabricate sensors with low motional resistance. In order to employ these sensors for crack monitoring, techniques suited for bonding the MEMS sensors on a steel surface ensuring good strain transfer from steel to silicon and a packaging technique for the bonded sensors are proposed, conceived for realizing a low-power crackmeter for ageing infrastructure monitoring. Moreover, the design of a possible crackmeter geometry suited for detection of crack contraction and expansion with a resolution of $10{\mu}m$ and very low power consumption requirements (potentially suitable for wireless operation) is presented. In these sensors, the small crackmeter range for the first field use is related to long-term observation on existing cracks in underground tunnel test sections.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.48 no.9
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• pp.605-610
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• 1999

An SOI(Silicon-On-Insulator) LD(Lateral Double-diffused)MOS with a recessed source structure is proposed to improve the on-resistance and the breakdown voltage. The recessed source structure can decrease the on-resistance by reducing the path of electron current, also increase the breakdown voltage by extending the effective length of gate field plate. Simulation results by TSUPREM4 and MEDICI have shown that the on-resistance of the LDMOS with a recessed source was 26% lower than conventional LDMOS. The breakdown voltage of proposed device was found to be 45V while that of conventional device was 36.5 V. At the same breakdown voltage of 36.5V, the on-resistance of the LDMOS with a recessed source was 41% lower than that of conventional structure.

• Journal of the Korean institute of surface engineering
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• v.33 no.2
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• pp.101-106
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• 2000

SOI (Silicon-On-Insulator) substrates were fabricated with varying annealing temperature of $25-660^{\circ}C$ by a linear annealing method, which was modified RTA process using a linear shape heat source. The annealing method was applied to Si ∥ $SiO_2$/Si pair pre-contacted at room temperature after wet cleaning process. The bonding strength of SOI substrates was measured by two methods of Razor-blade crack opening and direct tensile test. The fractured surfaces after direct tensile test were also investigated by the optical microscope as well as $\alpha$-STEP gauge. The interface bonding energy was 1140mJ/m$^2$ at the annealing temperature of $430^{\circ}C$. The fracture strength was about 21MPa at the temperature of $430^{\circ}C$. These mechanical properties were not reported with the conventional furnace annealing or rapid thermal annealing method at the temperature below $500^{\circ}C$. Our results imply that the bonded wafer pair could endure CMP (Chemo-Mechanical Polishing) or Lapping process without debonding, fracture or dopant redistribution.

• Journal of Sensor Science and Technology
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• v.3 no.1
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• pp.12-18
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• 1994

In this study, we fabricated and characterized a calorimetric-type flow sensing element using a micromachined silicon substrate. The cooling and heating effects resulted from the gas flow were measured by two temperature sensors located at both sides of the heating resistor, and the insulator diaphragm was employed as a substrate in order to improve thermal isolation. The sensor generated $0{\sim}378.4mV$ output signal under 10V bridge-applied voltage when the nitrogen gas was passed on the sensor surface having a mass flow rate of $0{\sim}0.25grs/min$, and reached to the stable operating condition within 10 seconds.

• Proceedings of the KIEE Conference
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• 2009.07a
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• pp.1507_1508
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• 2009

This study proposes a composite right/left-handed transmission line (CRLH-TL) that permits switching between the right-handed (RH) and left-handed (LH) modes using single crystalline silicon (SCS) RF MEMS switches. It is possible to change modes from the RH to LH mode, or vice versa, by controlling the admittance of capacitors and the impedance of inductors using switch operations. The proposed switchable CRLH-TL consists of SCS RF MEMS switches, metal-insulator-metal (MIM) capacitors and shunt inductors. At 8 GHz, the fabricated device shows a phase response of $87^{\circ}$ with an insertion loss of 2.7 dB in the LH mode, and a phase response of $-77^{\circ}$ with an insertion loss of 0.56 dB in the RH mode.

• Journal of the Korean Society for Precision Engineering
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• v.22 no.10 s.175
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• pp.195-201
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• 2005

A laterally driven electromagnetic microactuator (LaDEM) is presented, and a micro-optical switch is designed and fabricated as a possible application. LaDEM provides parallel actuation of the microactuator to the silicon substrate surface (in-plane mode) by the Lorentz force. Poly-silicon-on-insulator (Poly-SOI) wafers and a reactive ion etching (RIE) process were used to fabricate high-aspect-ratio vertical microstructures, which allowed the equipment of a vertical micro mirror. A fabricated arch-shaped leaf spring has a thickness of $1.8{\mu}m$, width of $16{\mu}m$, and length of $800{\mu}m$. The resistance of the fabricated structure fer the optical switch was approximately 5$\Omega$. The deflection of the leaf springs increases linearly up to about 400 mA and then it demonstrates a buckling behavior around the current value. Owing to this nonlinear phenomenon, a large displacement of $60{\mu}m$ could be measured at 566 mA. The displacement-load relation and some dynamic characteristics are analyzed using the finite element simulations.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.16 no.12S
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• pp.1175-1180
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• 2003

Transformer Coupled Plasma Chemical Vapor Deposited (TCP-CVD) silicon nitride (SiNx) is widely used as a gate dielectric material for thin film transistors (TFT). This paper reports the SiNx films, grown by TCP-CVD at the low temperature (30$0^{\circ}C$). Experimental investigations were carried out for the optimization o(SiNx film as a function of $N_2$/SiH$_4$ flow ratio varying ,3 to 50 keeping rf power of 200 W, This paper presents the dielectric studies of SiNx gate in terms of deposition rate, hydrogen content, etch rate and leakage current density characteristics lot the thin film transistor applications. And also, this work investigated means to decrease the leakage current of SiNx film by employing $N_2$ plasma treatment. The insulator layers were prepared by two step process; the $N_2$ plasma treatment and then PECVD SiNx deposition with SiH$_4$, $N_2$gases.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.15 no.5
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• pp.383-387
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• 2002

N-channel metal-ferroelectric-insulator-semiconductor field-effect-transistors (MFISFET's) by using $SrBi_2Ta_2O_9$/Silicon Nitride/Si (100) structure were fabricated. The fabricated devices exhibit comfortable memory windows, fast switching speeds, good fatigue resistances, and long retention times that are suitable for advanced ferroelectric memory applications. The estimated switching time and polarization ($2P_r$) of the fabricated FET measured at applied electric field of 376 kV/cm were less than 50 ns and about 1.5 uC/$\textrm{cm}^2$, respectively. The magnitude of on/off ratio indicating the stored information performance was maintained more than 3 orders until 3 days at room temperature. The $I_DV_G$ characteristics before and after being subjected to $10^11$ cycles of fatigue at a frequency of 1 MHz remained almost the same except a little distortion in off state.

• Proceedings of the KIEE Conference
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• 1993.11a
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• pp.243-245
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• 1993

The negative curvature effect on the breakdown voltage of p-n junction, which may realize 1-D breakdown voltage due to the lower peak electric field at the junction, is proposed and verified by the fabrication of lateral diode on Silicon-on-Insulator (SOI) together with MEDICI simulation. The experimental and simulation results show good agreements with the theoretical expectation. The proposed method is effectively applicable to the lateral, especially on SOI, power devices.