• Transactions on Electrical and Electronic Materials
• /
• 제12권5호
• /
• pp.209-212
• /
• 2011

Hafnium nitride (HfN) thin films were deposited onto a silicon substrate by inductive coupled nitrogen plasma-assisted radio frequency magnetron sputtering. The films were prepared without intentional substrate heating and a substrate negative bias voltage ($-V_b$) was varied from -50 to -150 V to accelerate the effects of nitrogen ions ($N^+$) on the substrate. X-ray diffractometer patterns showed that the structure of the films was strongly affected by the negative substrate bias voltage, and thin film crystallization in the HfN (100) plane was observed under deposition conditions of -100 $V_b$ (bias voltage). Atomic force microscopy results showed that surface roughness also varied significantly with substrate bias voltage. Films deposited under conditions of -150 $V_b$ (bias voltage) exhibited higher hardness than other films.

• 한국전기전자재료학회논문지
• /
• 제22권1호
• /
• pp.29-34
• /
• 2009

PLZT thin films were deposited on platinized silicon (Pt/$TiSiO_2$/Si) substrate by RF magnetron sputtering. A $TiO_2$ buffer layer was fabricated, prior to deposition of PLZT films. the layer was strongly affected the crystallographic orientation of the PLZT films. X-ray diffraction was performed on the films to study the crystallization of the films as various substrate temperatures (Ts). According to increasing Ts, preferred orientation of films was changed (110) plane to (111) plane. The ferroelectric, dielectric and electrical properties of the films were also investigated in detail as increased substrate temperatures. The PLZT films deposited at $400^{\circ}C$ showed good ferroelectric properties with the remnant polarization of $15.8{\mu}C/cm^2$ and leakage current of $5.4{\times}10^{-9}\;A/cm^2$.

• 대한전기학회논문지:전기물성ㆍ응용부문C
• /
• 제49권1호
• /
• pp.24-29
• /
• 2000

We propose a simple method to control the crystallization depth of amorphous silicon (a-Si) deposited by PECVD or LPCVD during the excimer laser annealing (ELA). Employing the new method, we have formed poly-Si/a-Si double film and fabricated a new poly-Si TFT with vertical a-Si offsets between the poly-Si channel and the source/drain of TFT without any additional photo-lithography process. The maximum leakage current of the new poly-Si TFT decreased about 80% due to the highly resistive vertical a-Si offsets which reduce the peak electric field in drain depletion region and suppress electron-hole pair generation. In ON state, current flows spreading down through broad a-Si cross-section in the vertical a-Si offsets and the current density in the drain depletion region where large electric field is applied is reduced. The stability of poly-Si TFT has been improved noticeably by suppressing trap state generation in drain region which is caused by high current density and large electric field. For example, ON current of the new TFT decreased only 7% at a stress condition where ON current of conventional TFT decreased 89%.

• 공업화학
• /
• 제16권6호
• /
• pp.768-771
• /
• 2005

Silicon nitride ($SiN_x$) 박막이 상온에서 $SiO_2/Si$ 기판 위에 반응성 직류 마그네트론 스퍼터링 방법에 의하여 증착되었다. 증착된 $SiN_x$ 박막의 조성은 x-ray photoelectron spectroscopy를 이용하여 분석되었으며 Si가 풍부한 $SiN_x$ 박막이 증착되었음을 확인할 수 있었다. 증착된 $SiN_x$ 박막은 annealing 온도와 시간을 변화하여 annealing 되었다. X-ray diffraction (XRD) 분석이 $SiN_x$ 박막 내에 Si의 결정화를 조사하기 위해서 수행되었고, 박막의 광학적 특성과 전기적 특성들이 Si nanodot의 형성을 확인하기 위하여 측정되었다. 그 결과로써, XRD 분석에서 Si으로 예상되어지는 peak을 관찰할 수 있었으며 annealing 시간과 온도가 증가함에 따라서 $SiN_x$ 박막의 photoluminescence intensity는 점진적으로 증가하는 것이 관찰되었다. Annealing 전과 후에 측정된 $SiN_x$ 박막의 capacitance-voltage 특성으로부터 $SiN_x$ 박막 내에 존재하는 Si nanodot에 의하여 electron이나 hole의 trap 효과가 나타남을 예상할 수 있었다.

• 한국진공학회:학술대회논문집
• /
• 한국진공학회 2000년도 제18회 학술발표회 논문개요집
• /
• pp.186-186
• /
• 2000

After LeComber et al. reported the first amorphous hydrogenated silicon (a-Si: H) TFT, many laboratories started the development of an active matrix LCDs using a-Si:H TFTs formed on glass substrate. With increasing the display area and pixel density of TFT-LCD, however, high mobility TFTs are required for pixel driver of TF-LCD in order to shorten the charging time of the pixel electrodes. The most important of these drawbacks is a-Si's electron mobiliy, which is the speed at which electrons can move through each transistor. The problem of low carier mobility for the a-Si:H TFTs can be overcome by introducing polycrystalline silicon (poly-Si) thin film instead of a-Si:H as a semiconductor layer of TFTs. Therefore, poly-Si has gained increasing interest and has been investigated by many researchers. Recnetly, fabrication of such poly-Si TFT-LCD panels with VGA pixel size and monolithic drivers has been reported, . Especially, fabricating poly-Si TFTs at a temperature mach lower than the strain point of glass is needed in order to have high mobility TFTs on large-size glass substrate, and the monolithic drivers will reduce the cost of TFT-LCDs. The conventional methods to fabricate poly-Si films are low pressure chemical vapor deposition (LPCVD0 as well as solid phase crystallization (SPC), pulsed rapid thermal annealing(PRTA), and eximer laser annealing (ELA). However, these methods have some disadvantages such as high deposition temperature over $600^{\circ}C$, small grain size (<50nm), poor crystallinity, and high grain boundary states. Therefore the low temperature and large area processes using a cheap glass substrate are impossible because of high temperature process. In this study, therefore, we have deposited poly-Si thin films on si(100) and glass substrates at growth temperature of below 40$0^{\circ}C$ using newly developed high rate magnetron sputtering method. To improve the sputtering yield and the growth rate, a high power (10~30 W/cm2) sputtering source with unbalanced magnetron and Si ion extraction grid was designed and constructed based on the results of computer simulation. The maximum deposition rate could be reached to be 0.35$\mu$m/min due to a high ion bombardment. This is 5 times higher than that of conventional sputtering method, and the sputtering yield was also increased up to 80%. The best film was obtained on Si(100) using Si ion extraction grid under 9.0$\times$10-3Torr of working pressure and 11 W/cm2 of the target power density. The electron mobility of the poly-si film grown on Si(100) at 40$0^{\circ}C$ with ion extraction grid shows 96 cm2/V sec. During sputtering, moreover, the characteristics of si source were also analyzed with in situ Langmuir probe method and optical emission spectroscopy.

• 한국인터넷방송통신학회논문지
• /
• 제12권1호
• /
• pp.245-248
• /
• 2012

본 논문에서는 실리콘 기반의 기술과 차별화하여 저온동시소성세라믹 (LTCC) 기판을 이용하여 대표적 압전물질인 PZT 박막의 최적의 증착조건을 연구하였다. LTCC 기술은 실리콘 기반의 기술에 비하여 낮은 생산 단가, 높은 수율, 3차원 구조물의 용이한 제작성 등으로 인하여 센서 및 액추에이터와 같은 10 um ~ 수백 um 정도의 중규모 디바이스를 제작하는데 있어서 중요한 역할을 담당하고 있다. LTCC 기판은 NEG사의 MLS 22C 상용 파우더를 이용하여 100 um 두께의 그린쉬트를 적층하고 동시소결하여 400 um 두께로 제작하였다. 제작한 기판위에 Pt/Ti 하부전극을 증착하고 RF 마그네트론 스퍼터링 방법을 이용하여 PZT 박막의 증착조건을 연구하였다. 증착조건으로는 RF 전력과 아르곤과 산소 가스비를 가변하여 실시하였으며, XRD와 EDS를 사용하여 박막의 결정성 및 성분을 분석하였다. 실험을 통하여 얻어진 최적의 증착조건은 RF 전력 125W, 아르곤과 산소비 15:5에서 가장 우수한 특성을 나타내는 것을 확인하였다.

• 한국정보디스플레이학회:학술대회논문집
• /
• 한국정보디스플레이학회 2006년도 6th International Meeting on Information Display
• /
• pp.647-650
• /
• 2006

Low temperature polycrystalline silicon (LTPS) technology using a high power laser have been widely applied to thin film transistors (TFTs) for liquid crystal, organic light emitting diode (OLED) display, driver circuit for system on glass (SOG) and static random access memory (SRAM). Recently, the semiconductor industry is continuing its quest to create even more powerful CPU and memory chips. This requires increasing of individual device speed through the continual reduction of the minimum size of device features and increasing of device density on the chip. Moreover, the flat panel display industry also need to be brighter, with richer more vivid color, wider viewing angle, have faster video capability and be more durable at lower cost. Kornic Systems Co., Ltd. developed the $KORONA^{TM}$ LTP/GLTP series - an innovative production tool for fabricating flat panel displays and semiconductor devices - to meet these growing market demands and advance the volume production capabilities of flat panel displays and semiconductor industry. The $KORONA^{TM}\;LTP/GLTP$ series using DPSS laser and XeCl excimer laser is designed for the new generation of the wafer & FPD glass annealing processing equipment combining advanced low temperature poly-silicon (LTPS) crystallization technology and object-oriented software architecture with a semistandard graphical user interface (GUI). These leading edge systems show the superior annealing ability to the conventional other method. The $KORONA^{TM}\;LTP/GLTP$ series provides technical and economical benefits of advanced annealing solution to semiconductor and FPD production performance with an exceptional level of productivity. High throughput, low cost of ownership and optimized system efficiency brings the highest yield and lowest cost per wafer/glass on the annealing market.

• 한국정보디스플레이학회:학술대회논문집
• /
• 한국정보디스플레이학회 2008년도 International Meeting on Information Display
• /
• pp.1261-1262
• /
• 2008

Laser-based crystallization techniques are ideally-suited for forming high-quality crystalline Si films on active-matrix display backplanes, because the highly-localized energy deposition allows for transformation of the as-deposited a-Si without damaging high-temperature-intolerant glass and plastic substrates. However, certain significant and non-trivial attributes must be satisfied for a particular method and implementation to be considered manufacturing-worthy. The crystallization process step must yield a Si microstructure that permits fabrication of thin-film transistors with sufficient uniformity and performance for the intended application and, the realization and implementation of the method must meet specific requirements of viability, robustness and economy in order to be accepted in mass production environments. In recent years, Low Temperature Polycrystalline Silicon (LTPS) has demonstrated its advantages through successful implementation in the application spaces that include highly-integrated active-matrix liquid-crystal displays (AMLCDs), cost competitive AMLCDs, and most recently, active-matrix organic light-emitting diode displays (AMOLEDs). In the mobile display market segment, LTPS continues to gain market share, as consumers demand mobile devices with higher display performance, longer battery life and reduced form factor. LTPS-based mobile displays have clearly demonstrated significant advantages in this regard. While the benefits of LTPS for mobile phones are well recognized, other mobile electronic applications such as portable multimedia players, tablet computers, ultra-mobile personal computers and notebook computers also stand to benefit from the performance and potential cost advantages offered by LTPS. Recently, significant efforts have been made to enable robust and cost-effective LTPS backplane manufacturing for AMOLED displays. The majority of the technical focus has been placed on ensuring the formation of extremely uniform poly-Si films. Although current commercially available AMOLED displays are aimed primarily at mobile applications, it is expected that continued development of the technology will soon lead to larger display sizes. Since LTPS backplanes are essentially required for AMOLED displays, LTPS manufacturing technology must be ready to scale the high degree of uniformity beyond the small and medium displays sizes. It is imperative for the manufacturers of LTPS crystallization equipment to ensure that the widespread adoption of the technology is not hindered by limitations of performance, uniformity or display size. In our presentation, we plan to present the state of the art in light sources and beam delivery systems used in high-volume manufacturing laser crystallization equipment. We will show that excimer-laser-based crystallization technologies are currently meeting the stringent requirements of AMOLED display fabrication, and are well positioned to meet the future demands for manufacturing these displays as well.

• 대한전기학회:학술대회논문집
• /
• 대한전기학회 2011년도 제42회 하계학술대회
• /
• pp.1416-1417
• /
• 2011

킹크효과를 억제할 수 있는 새로운 f-모양 트리플게이트 구조를 가지는 다결정실리콘 박막트랜지스터는 추가적인 공정과정 없이 제안 및 제작되었다. 이러한 다결정실리콘 박막트랜지스터의 채널에는 순차적인 횡방향 고체화(Sequential Lateral Solidification, SLS)나 CW 레이져 횡방향 결정화(CW laser Lateral Crystallization, CLC) 등과 같은 방법으로 제작된 횡방향으로 성장시킨 그레인이 있다. 이 소자의 전체적인 전류흐름은 횡방향으로 성장시킨 그레인 경계에 강력하게 영향을 받는다. f-모양 트리플게이트에는 횡방향으로 성장시킨 그레인과 평행한 방향으로 위치한 채널, 그리고 수직인 방향으로 위치한 채널이 있다. 이 소자는 f-모양 게이트 구조에서의 비대칭 이동도를 이용하여 다결정실리콘 박막트랜지스터의 킹크효과를 효과적으로 억제시킬 수 있다는 사실을 실험과 시뮬레이션을 통해 검증되었다. 우리의 실험 결과는 이 논문에서 제안된 f-모양 트리플게이트 박막트랜지스터가 기존의 박막트랜지스터와 비교할 때 더 효과적으로 킹크 효과를 감소시킬 수 있다는 것을 보여주었다. 또한 고온 캐리어 스트레스 조건에서의 신뢰성도 개선할 수 있음이 확인되었다.

• 한국전기전자재료학회논문지
• /
• 제15권4호
• /
• pp.367-372
• /
• 2002

The vertically well-aligned carbon nanotubes(CNTs) were successfully grown on Ni coated silicon wafer substrate by DC bias-assisted PECVD(Plasma Enhanced Chemical Vapor Deposition). As a catalyst, Ni thin film of thickness ranging from 15~30nm was prepared by electron beam evaporator method. In order to find the optimum growth condition, the type of gas mixture such as $C_2H_2-NH_3$ was systematically investigated by adjusting the gas mixing ratio at $570^{\circ}C$ under 0.4Torr. The diameter of the grown CNTs was 40~200nm and the diameter of the CNTs increased with increasing the Ni particles size. TEM images clearly showed carbon nanotubes to be multiwalled. The measured turn-on field was $3.9V/\mu\textrm{m}$ and an emission current of $1.4{\times}10^4A/\textrm{cm}^2$ was $7V/\mu\textrm{m}$. The CNTs grown by bias-assisted PECVD was able to demonstrate high quality in terms of vertical alignment, crystallization of graphite and the processing technique at low temperature of $570^{\circ}C$ and this can be applied for the emitter tip of FEDs.