• 제목/요약/키워드: Silicon thin

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New Generation Multijunction Solar Cells for Achieving High Efficiencies

  • Lee, Sunhwa;Park, Jinjoo;Kim, Youngkuk;Kim, Sangho;Iftiquar, S.M.;Yi, Junsin
    • Current Photovoltaic Research
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    • 제6권2호
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    • pp.31-38
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    • 2018
  • Multijunction solar cells present a practical solution towards a better photovoltaic conversion for a wider spectral range. In this review, we compare different types of multi-ijunction solar cell. First, we introduce thin film multijunction solar cell include to the thin film silicon, III-V material and chalcopyrite material. Until now the maximum reported power conversion efficiencies (PCE) of solar cells having different component sub-cells are 14.0% (thin film silicon), 46% (III-V material), 4.4% (chalcopyrite material) respectively. We then discuss the development of multijunction solar cell in which c-Si is used as bottom sub-cell while III-V material, thin film silicon, chalcopyrite material or perovskite material is used as top sub-cells.

급속 건식 열산화 방법에 의한 초박막 SiO2의 성장과 특성 (Growth and Properties of Ultra-thin SiO2 Films by Rapid Thermal Dry Oxidation Technique)

  • 정상현;김광호;김용성;이수홍
    • 한국전기전자재료학회논문지
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    • 제17권1호
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    • pp.21-26
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    • 2004
  • Ultra-thin silicon dioxides were grown on p-type(100) oriented silicon employing rapid thermal dry oxidation technique at the temperature range of 850∼1050 $^{\circ}C$. The growth rate of the ultra-thin film was fitted well with tile model which was proposed recently by da Silva & Stosic. The capacitance-voltage, current-voltage, characteristics were used to study the electrical properties of these thin oxides. The minimum interface state density around the midgap of the MOS capacitor having oxide thickness of 111.6 $\AA$ derived from the C-V curve was ranged from 6 to 10${\times}$10$^{10}$ /$\textrm{cm}^2$eV.

Residual stress on nanocrystalline silicon thin films deposited with substrate biasing at low temperature

  • Lee, Hyoung-Cheol;Kim, In-Kyo;Yeom, Geun-Young
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2009년도 9th International Meeting on Information Display
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    • pp.1568-1570
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    • 2009
  • Nanocrystalline silicon thin films were deposited using an internal-type inductively coupled plasma-chemical vapor deposition at room temperature by varying the bias power to the substrate and the structural characteristics of the deposited thin film were investigated. The result showed that the crystalline volume fraction was decreased with the increase of bias power. At the low bias power range of 0~60 W, the compress stress in the deposited thin film was in the range of -34 ~ -77 Mpa which is generally lower than the residual stress observed for the nanocrystalline silicon thin films deposited by capacitively coupled plasma.

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Determination of Copper in Uniformly-Doped Silicon Thin Films by Isotope-Dilution Inductively Coupled Plasma Mass Spectrometry

  • 박창J.;차명J.;이동S.
    • Bulletin of the Korean Chemical Society
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    • 제22권2호
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    • pp.205-209
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    • 2001
  • Uniformly-doped silicon thin films were fabricated by ion beam sputter deposition. The thin films had four levels of copper dopant concentration ranging between 1 ${\times}$1019 and 1 ${\times}$ 1021 atoms/cm3 . Concentrations of Copper dopants were determined by the isotope dilution inductively coupled plasma mass spectrometry (ICP-MS) to provide certified reference data for the quantitative surface analysis by secondary ion mass spectrometry (SIMS). The copper-doped thin films were dissolved in a mixture of 1 M HF and 3 M HNO3 spiked with appropriate amounts of 65 Cu. For an accurate isotope ratio determination, both the detector dead time and the mass discrimination were appropriately corrected and isobaric interference from SiAr molecular ions was avoided by a careful sample pretreatment. An analyte recovery efficiency was obtained for the Cu spiked samples to evaluate accuracy of the method. Uncertainty of the determined copper concentrations, estimated following the EURACHEM Guide, was less than 4%, and detection limit of this method was 5.58 ${\times}$ 1016 atoms/cm3.

Mobility Enhancement in Polycrystalline Silicon Thin Film Transistors due to the Dehydrogenation Mechanism

  • Lee, Seok Ryoul;Sung, Sang-Yun;Lee, Kyong Taik;Cho, Seong Gook;Lee, Ho Seong
    • Journal of the Korean Physical Society
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    • 제73권9호
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    • pp.1329-1333
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    • 2018
  • We investigated the mechanism of mobility enhancement after the dehydrogenation process in polycrystalline silicon (poly-Si) thin films. The dehydrogenation process was performed by using an in-situ CVD chamber in a $N_2$ ambient or an ex-situ furnace in air ambient. We observed that the dehydrogenated poly-Si in a $N_2$ ambient had a lower oxygen concentration than the dehydrogenated poly-Si annealed in an air ambient. The in-situ dehydrogenation increased the (111) preferred orientation of poly-Si and reduced the oxygen concentration in poly-Si thin films, leading to a reduction of the trap density near the valence band. This phenomenon gave rise to an increase of the field-effect mobility of the poly-Si thin film transistor.

폐슬러지를 이용한 SiC 합성에 관한 열역학적 고찰 (Thermodynamic Consideration for SiC synthesis by Using Sludged Silicon Powder)

  • 최미령;김영철
    • 반도체디스플레이기술학회지
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    • 제2권1호
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    • pp.21-24
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    • 2003
  • Sludged silicon powders that are generated during silicon ingot slicing process have potential usage as silicon source in fabricating silicon carbide powders by adding carbon. A thermodynamic calculation is performed to consider a plausible formation condition for the silicon carbide powders. A thin silicon oxide layer around silicon powder is sufficient to supply equilibrium oxygen partial pressure at the formation temperature($1400^{\circ}C$) of the silicon carbide in the Si-C-O ternary system. Formation of silicon carbide by using the sludged silicon powders is more efficient than by using silicon oxide powders.

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The Effects of Nanocrystalline Silicon Thin Film Thickness on Top Gate Nanocrystalline Silicon Thin Film Transistor Fabricated at 180℃

  • Kang, Dong-Won;Park, Joong-Hyun;Han, Sang-Myeon;Han, Min-Koo
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제8권2호
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    • pp.111-114
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    • 2008
  • We studied the influence of nanocrystalline silicon (nc-Si) thin film thickness on top gate nc-Si thin film transistor (TFT) fabricated at $180^{\circ}C$. The nc-Si thickness affects the characteristics of nc-Si TFT due to the nc-Si growth similar to a columnar. As the thickness of nc-Si increases from 40 nm to 200 nm, the grain size was increased from 20 nm to 40 nm. Having a large grain size, the thick nc-Si TFT surpasses the thin nc-Si TFT in terms of electrical characteristics such as field effect mobility. The channel resistance was decreased due to growth of the grain. We obtained the experimental results that the field effect mobility of the fabricated devices of which nc-Si thickness is 60, 90 and 130 nm are 26, 77 and $119\;cm^2/Vsec$, respectively. The leakage current, however, is increased from $7.2{\times}10^{-10}$ to $1.9{\times}10^{-8}\;A$ at $V_{GS}=-4.4\;V$ when the nc-Si thickness increases. It is originated from the decrease of the channel resistance.

Development of Nano Crystal Embedded Polymorphous Silicon Thin Film by Neutral Beam Assisted CVD Process at Room Temperature

  • Jang, Jin-Nyoung;Lee, Dong-Hyeok;So, Hyun-Wook;Yoo, Suk-Jae;Lee, Bon-Ju;Hong, Mun-Pyo
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2012년도 제42회 동계 정기 학술대회 초록집
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    • pp.171-171
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    • 2012
  • Neutral beam assisted chemical vapor deposition (NBa-CVD) process has been developed as a nove,l room temperature deposition process for the light-soaking free nano-crystalline silicon (nc-Si) thin films including intrinsic and n-type doped thin film. During formation of nc-Si thin films by the NBa-CVD process with silicon reflector at room temperature, the energetic particles enhance doping efficiency and crystalline phase in nc-Si thin films without additional heating at substrate. The effects of incident NB energy controlled by the reflector bias have been confirmed by Raman spectra analysis. Additionally, TEM images show uniform nc-Si grains which imbedded amorphous phase without incubation layer. The nc-Si films by the NBa-CVD are hardly degenerated by light soaking; the degradations of photoconductivity were just a few percents before and after light irradiation.

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그라파이트 기판을 이용한 유연 박막 실리콘 태양전지 특성 향상 (Performance Improvement of Flexible Thin Film Si Solar Cells using Graphite Substrate)

  • 임경열;조준식;장효식
    • 한국재료학회지
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    • 제29권5호
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    • pp.317-321
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    • 2019
  • We investigated the characteristics of nano crystalline silicon(nc-Si) thin-film solar cells on graphite substrates. Amorphous silicon(a-Si) thin-film solar cells on graphite plates show low conversion efficiency due to high surface roughness, and many recombination by dangling bonds. In previous studies, we deposited barrier films by plasma enhanced chemical vapor deposition(PECVD) on graphite plate to reduce surface roughness and achieved ~7.8 % cell efficiency. In this study, we fabricated nc-Si thin film solar cell on graphite in order to increase the efficiency of solar cells. We achieved 8.45 % efficiency on graphite plate and applied this to nc-Si on graphite sheet for flexible solar cell applications. The characterization of the cell is performed with external quantum efficiency(EQE) and current density-voltage measurements(J-V). As a result, we obtain ~8.42 % cell efficiency in a flexible solar cell fabricated on a graphite sheet, which performance is similar to that of cells fabricated on graphite plates.

실리콘 태양전지 응용을 위한 황 결핍 n형 MoS2 층 연구 (Sulfur Defect-induced n-type MoS2 Thin Films for Silicon Solar Cell Applications)

  • 이인승;김근주
    • 반도체디스플레이기술학회지
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    • 제22권3호
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    • pp.46-51
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    • 2023
  • We investigated the MoS2 thin film layer by thermolytic deposition and applied it to the silicon solar cells. MoS2 thin films were made by two methods of dipping and spin coating of (NH4)2MoS4 precursor solution. We implemented two types of substrates of microtextured and nano-microtextured 6-in. Si pn junction wafers. The fabricated MoS2 thin film layer was analyzed, and solar cells were fabricated by applying the standard silicon solar cell process. The MoS2 thin film layer of sulfur-deficient form was deposited on the n-type emitter layer, and electrons, which are minority carriers, were well transported at the interface and exhibited photovoltaic solar cell characteristics. The cell efficiencies were achieved at 5% for microtextured wafers and 2.56% for nano-microtextured wafers.

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