• Journal of the Semiconductor & Display Technology
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• v.14 no.3
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• pp.7-11
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• 2015

In order to protect the patterned mask from contamination during lithography process, pellicle has become a critical component for Extreme Ultraviolet (EUV) lithography technology. According to EUV pellicle requirements, the pellicle should have high EUV transmittance and robust mechanical property. In this study, silicon nitride, which is well-known for its remarkable mechanical property, was used as a pellicle membrane material to achieve high EUV transmittance. Since long silicon wet etching process time aggravates notching effect causing stress concentration on the edge or corner of etched structure, the remaining membrane is prone to fracture at the end of etch process. To overcome this notching effect and attain high transmittance, we began preparing a rather thick (200 nm) $SiN_x$ membrane which can be stably manufactured and was thinned into 43 nm thickness with HF wet etching process. The measured EUV transmittance shows similar values to the simulated result. Therefore, the result shows possibilities of HF thinning processes for $SiN_x$ EUV pellicle fabrication.

• Proceedings of the International Microelectronics And Packaging Society Conference
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• 2003.11a
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• pp.177-180
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• 2003

초 박형 실리콘 칩을 이용하여 실리콘 칩들을 포함한 모듈 전체가 굽힘이 자유로운 유연 패키징 기술을 구현하였으며 bending test와 FEA를 통해 초 박형 실리콘 칩의 기계적 특성을 살펴보았다. 초 박형 실리콘칩$(t<30{\mu}m)$은 표면손상의 가능성을 배제하기 위해 화학적 thinning 방법을 이용하여 제작되었으며 열압착 방식에 의해 $Kapton^{(R)}$에 바로 실장 되었다. 실리콘칩과 $Kapton^{(R)}$ 기판간의 단차가 적기 때문에 전기도금 방식으로 전기적 결선을 이룰 수 있었다. 이러한 방식의 패키징은 이러한 공정은 flip chip 공정에 비해 공정 간단하고 wire 본딩과 달리 표면 단차 적다. 따라서 연성회로 기관을 비롯한 인쇄회로기판의 표면뿐만 아니라 기판 자체에 삽임이 가능하여 패키징 밀도 증가를 기대할 수 있으며 실질적인 실장 가능면적을 극대화 할 수 있다.

• Journal of Korea Foresty Energy
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• v.22 no.1
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• pp.24-29
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• 2003

Using woodceramics made from sawdust board of Larix leptolepis thinning logs, change in surface temperature were investigated, by the rate of resin impregnation and burning temperature. As the surface temperature of silicon rubber heater was going up, that of woodceramics also increase rapidly. Woodceramics made from under the condition of the rate of resin impregnation 70-80% and burning temperature 800-$1000^{\circ}C$, were higher than that of surface temperature. Also, it was found that woodceramics maintained heat for a long time because the descending velocity of their surface temperature was lower than that of the heater.

• Korean Chemical Engineering Research
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• v.47 no.1
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• pp.1-10
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• 2009

As a demand for the portable device requiring smaller size and better performance is in hike, reducing the size of conventionally used planar 2 dimensional chip cannot be a solution for the enhancement of the semiconductor chip technology due to an increase in RC delay among interconnects. To address this problem, a new technology - "3 dimensional (3D) IC chip stack" - has been emerging. For the integration of the technology, several new key unit processes (e.g., silicon through via, wafer thinning and wafer alignment and bonding) should be developed and much effort is being made to achieve the goal. As a result of such efforts, 4 and 8 chip-stacked DRAM and NAND structures and a system stacking CPU and memory chips vertically were successfully developed. In this article, basic theory, configurations and key unit processes for the 3D IC chip integration, and a current tendency of the technology are explained. Future opportunities and directions are also discussed.

• Proceedings of the Korean Society of Propulsion Engineers Conference
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• 2017.05a
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• pp.456-461
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• 2017

In this study, the rheological properties of nitromethane gel propellants on nano/micron sized gelling agent are investigated. Silicon dioxide is used as the gellant with 5 wt%, 6.5 wt% and 8 wt% concentration, respectively, where the measurements are conducted under steady-state shear flow conditions using a rotational rheometer. The nitromethane/silicon dioxide gel showed non-Newtonian flow behavior for the entire experimental shear rate ranges. The gel fuels with nano-sized gellant had a slightly higher viscosity than the gel fuels with micron-sized one for low shear rate range. Additionally, it was found that Herschel-Bulkley model can hardly describe the rheological behavior of nitromethane gel propellant, but the NM model(by Teipel and Forter-Barth) is better suited to explain the rheological behavior of nitromethane gel propellant.

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.10 no.2
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• pp.100-104
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• 2000

Diamond film was deposited on Si substrate by using microwave plasma-enhanced chemical vapor deposition (MPECVD) system. After thinning the cross section between diamond film and Si substrate by ion milling method, we investigated its interface via transmission electron microscopy We could observe that the diamond film was grown either directly on Si substrate or via the interlayer between diamond film and Si substrate. Thickness of the interlayer was varied along the cross section. The interlayer might mainly composed of Sic andlor amorphous carbon. We could observe the well-developed electron diffraction pattern of both Si and diamond around the interface. Based on this result, we can conjecture the initial growth behavior of diamond film on Si substrate.

• Journal of the Korean Society of Manufacturing Process Engineers
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• v.11 no.6
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• pp.48-54
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• 2012

In recent years, developments in the semiconductor and electronic industries have brought a rapid increase in the use of large size silicon. However, for many companies, it is hard to produce 400mm or 450mm wafers, because of excesive funds for exchange the equipments. Therefore, it is necessary to investigate 300mm wafer to obtain a better efficiency and a good property rate. Polishing is one of the important methods in manufacturing of Si wafers and in thinning of completed device wafers. This research investigated the surface characteristics that apply variable machining conditions and Taguchi Method was used to obtain more flexible and optimal condition. In this study, the machining conditions have head speed, oscillation speed and polishing time. By using optimum condition, it achieves a ultra precision mirror like surface.

• Transactions of the Korean Society of Machine Tool Engineers
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• v.17 no.2
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• pp.1-6
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• 2008

In recent years, developments in the semiconductor and electronic industries have brought a rapid increase in the use of large size silicon wafer. For further improvement of the ultra precision surface and flatness of Si wafer necessary to high density ULSI, it is known that polishing is very important. However, most of these investigation was experiment less than 300mm diameter. Polishing is one of the important methods in manufacturing of Si wafers and in thinning of completed device wafers. This study reports the machining variables that has major influence on the characteristic of wafer polishing. It was adapted to polishing pressure, machining speed, and the slurry mix ratio, the optimum condition is selected by ultra precision wafer polishing using load cell and infrared temperature sensor. The optimum machining condition is selected a result data that use a pressure and table speed data. By using optimum condition, it achieves a ultra precision mirror like surface.

• Applied Microscopy
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• v.34 no.2
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• pp.95-102
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• 2004

The TEM samples prepared by ion milling have the advantage that thin area can be obtained from almost any materials. However, it has the disadvantage that the amount of thin area can often be quite limited. For the cross-sectioned samples and grossly heterogeneous materials, the thickness of less than $0.1{\mu}m$ can be achieved by mechanical grinding and polishing (tripod polisher) and then the TEM samples may be ion-milled for final thinning or cleaning. These approaches were described in this paper. Examples of TEM observations were taken from cross-section samples of thin films on silicon and sapphire, from diffusion layers between $Mo_5Si_3\;and\;Mo_2B$, and from rapidly solidified 304 stainless steel powders embedded in electroplated copper.