• Journal of the Korean Crystal Growth and Crystal Technology
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• v.16 no.6
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• pp.256-259
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• 2006

The amorphous $SiO_x$ nanowires were synthesized by the vapor phase epitaxy (VPE) method. $SiO_x$ nanowires were formed on silicon wafer of temperatures ranged from $800{\sim}1100^{\circ}C$ and nickel thin film was used as a catalyst for the growth of nanowires. A vapor-liquid-solid (VLS) mechanism is responsible for the catalyst-assisted amorphous $SiO_x$ nanowires synthesis in this experiment. The SEM images showed cotton-like nanostructure of free standing $SiO_x$ nanowires with the length of more than about $10{\mu}m$. The $SiO_x$ nanowires were confirmed amorphous structure by TEM analysis and EDX spectrum reveals that the nanowires consist of Si and O.

• 한국정보디스플레이학회:학술대회논문집
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• 2009.10a
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• pp.1051-1054
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• 2009

This paper investigates approaches for improving effective mobility of organic thin film transistors (OTFTs). We consider gate dielectric optimization, whereby we demonstrated >2x increase in mobility by using a silicon-rich silicon nitride ($SiN_x$) gate dielectric for polythiophene-based (PQT) OTFTs. We also engineer the dielectric-semiconductor ($SiN_x$-PQT) interface to attain a 27x increase in mobility (up to 0.22 $cm^2$/V-s) using an optimized combination of oxygen plasma and OTS SAM treatments. Augmentative material systems by combining 1-D nanomaterials (e.g., carbon nanotubes, zinc oxide nanowires) in an organic matrix for nanocomposite OTFTs provided a further boost in device performance.

• Proceedings of the Korea Association of Crystal Growth Conference
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• 2000.06a
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• pp.87-125
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• 2000

A new paradigm of crystal growth was suggested in a charged cluster model, where charged clusters of nanometer size are suspended in the gas phase in most thin film processes and are a major flux for thin film growth. The existence of these hypothetical clusters was experimentally confirmed in the diamond and silicon CVD processes as well as in gold and tungsten evaporation. These results imply new insights as to the low pressure diamond synthesis without hydrogen, epitaxial growth, selective deposition and fabrication of quantum dots, nanometer-sized powders and nanowires or nanotubes. Based on this concept, we produced such quantum dot structures of carbon, silicon, gold and tungsten. Charged clusters land preferably on conducting substrates over on insulating substrates, resulting in selective deposition. if the behavior of selective deposition is properly controlled, charged clusters can make highly anisotropic growth, leading to nanowires or nanotubes.

• Transactions on Electrical and Electronic Materials
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• v.13 no.2
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• pp.73-77
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• 2012

Operation of liquid crystal displays (LCDs) can be improved by monolithic integration of the pixel transistors with light emitting diodes (LEDs) on a single substrate. Conventional LCDs make use of filters to control the backlighting which reduces the overall efficiency. These LCDs also utilize LEDs in series which impose failure and they require high voltage for operation with a power factor correction. The screen of small hand-held devices can operate from moderate brightness. Therefore, III-V nanowires that are grown along with transistors over Silicon substrates can be utilized. Control of nanowire LEDs with nanowire transistors will significantly lower the cost, increase the efficiency, improve the manufacturing yield and simplify the structure of the small displays that are used in portable devices. The steps to grow nanowires on Silicon substrates are described. The vertical n-type and p-type nanowire transistors with surrounding gate structures are characterized. While biased at 0.5 V, nanowire transistors with minimum radius or channel width have an OFF current which is less than 1pA, an ON current more than 1 ${\mu}A$, a total delay less than 10 ps and a transconductance gain of more than 10 ${\mu}A/V$. The low power and fast switching characteristics of the nanowire transistor make them an ideal choice for the realization of future displays of portable devices with long battery lifetime.

• Proceedings of the Materials Research Society of Korea Conference
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• 2012.05a
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• pp.88.1-88.1
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• 2012

Silicon nanowires (SiNWs), due to their unusual quantum-confinement effects that lead to superior electrical and optical properties compared to those of the bulk silicon, have been widely researched as a potential building block in a variety of novel electronic devices. The conventional means for the synthesis of SiNWs has been the vapor-liquid-solid method using chemical vapor deposition; however, this method is time consuming, environmentally unfriendly, and do not support vertical growth. As an alternate, the electroless etching method has been proposed, which uses metal catalysts contained in aqueous hydrofluoric acids (HF) for vertically etching the bulk silicon substrate. This new method can support large-area growth in a short time, and vertically aligned SiNWs with high aspect ratio can be readily synthesized with excellent reproducibility. Nonetheless, there still are rooms for improvement such as the poor surface characteristics that lead to degradation in electrical performance, and non-uniformity of the diameter and shapes of the synthesized SiNWs. Here, we report a facile method of SiNWs synthesis having uniform sizes, diameters, and shapes, which may be other than just cylindrical shapes using a modified nanosphere lithography technique. The diameters of the polystyrene nanospheres can be adjustable through varying the time of O2 plasma treatment, which serve as a mask template for metal deposition on a silicon substrate. After the removal of the nanospheres, SiNWs having the exact same shape as the mask are synthesized using wet etching technique in a solution of HF, hydrogen peroxide, and deionized water. Different electrical and optical characteristics were obtained according to the shapes and sizes of the SiNWs, which implies that they can serve specific purposes according to their types.

• Journal of Integrative Natural Science
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• v.5 no.4
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• pp.211-215
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• 2012

Single-crystalline silicon nanowire arrays (SiNWAs) using electroless metal-assisted etchings of p-type silicon were successfully fabricated. Ag nanoparticle deposition on silicon wafers in HF solution acted as a localized micro-electrochemical redox reaction process in which both anodic and cathodic process took place simultaneously at the silicon surface to give SiNWAs. The growth effect of SiNWs was investigated by changing of etching times. The morphologies of SiNWAs were obtained by SEM observation. Well-aligned nanowire arrays perpendicular to the surface of the silicon substrate were produced. Optical characteristics of SiNWs were measured by FT-IR spectroscopy and indicated that the surface of SiNWs are terminated with hydrogen. The thicknesses and lengths of SiNWs are typically 150-250 nm and 2 to 5 microns, respectively.

• Journal of the Korean Vacuum Society
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• v.12 no.4
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• pp.281-287
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• 2003

We have performed classical molecular dynamics simulations for hypothetical silicon nanotubes using the Tersoff potential. Our investigation presented a systematic study about the thermal behavior of hypothetical silicon nanotubes and showed the difficulty in Producing silicon nanotubes or graphitelike sheets. Through the investigations on the structure and properties of a double-wall silicon nanotube, we concluded that quasi-one dimensional structures consisting of silicon atoms become nanowires or multi wall nanotubes rather than single wall nanotubes in order to minimize the number of $sp^2$ bonds.

• Journal of Electrochemical Science and Technology
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• v.2 no.3
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• pp.157-162
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• 2011

We report a simple route for synthesizing multi-dimensional structured silicon anode materials from commercially available bulk silicon powders via metal-assisted chemical etching process. In the first step, silver catalyst was deposited onto the surface of bulk silicon via a galvanic displacement reaction. Next, the silver-decorated silicon particles were chemically etched in a mixture of hydrofluoric acid and hydrogen peroxide to make multi-dimensional silicon consisting of one-dimensional silicon nanowires and micro-scale silicon cores. As-synthesized silicon particles were coated with a carbon via thermal decomposition of acetylene gas. The carbon-coated multi-dimensional silicon anodes exhibited excellent electrochemical properties, including a high specific capacity (1800 mAh/g), a stable cycling retention (cycling retention of 89% after 20 cycles), and a high rate capability (71% at 3 C rate, compared to 0.1 C rate). This process is a simple and mass-productive (yield of 40-50%), thus opens up an effective route to make a high-performance silicon anode materials for lithiumion batteries.

• Journal of the Korean Vacuum Society
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• v.20 no.6
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• pp.395-402
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• 2011

The nanomechanical properties of fully lithiated and unlithiated silicon nanowire deposited on silicon substrate have been studied with atomic force microscopy. Silicon nanowires were synthesized using the vapor-liquid-solid process on stainless steel substrates using Au catalyst. Fully lithiated silicon nanowires were obtained by using the electrochemical method, followed by drop-casting on the silicon substrate. The roughness, derived from a line profile of the surface measured in contact mode atomic force microscopy, has a smaller value ($0.65{\pm}0.05$ nm) for lithiated silicon nanowire and a higher value ($1.72{\pm}0.16$ nm) for unlithiated silicon nanowire. Force spectroscopy was utilitzed to study the influence of lithiation on the tip-surface adhesion force. Lithiated silicon nanowire revealed a smaller value (~15 nN) than that of the Si nanowire substrate (~60 nN) by a factor of two, while the adhesion force of the silicon nanowire is similar to that of the silicon substrate. The elastic local spring constants obtained from the force-distance curve, also shows that the unlithiated silicon nanowire has a relatively smaller value (16.98 N/m) than lithiated silicon nanowire (66.30 N/m) due to the elastically soft amorphous structures. The frictional forces of lithiated and unlithiated silicon nanowire were obtained within the range of 0.5-4.0 Hz and 0.01-200 nN for velocity and load dependency, respectively. We explain the trend of adhesion and modulus in light of the materials properties of silicon and lithiated silicon. The results suggest a useful method for chemical identification of the lithiated region during the charging and discharging process.

• Proceedings of the Korean Vacuum Society Conference
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• 2011.02a
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• pp.499-499
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• 2011

Silicon nanowires (Si NWs) have been extensively studied for nanoelectronics owing to their unique optical and electrical properties different from those of bulk silicon. For the development of Si NW devices, better understanding of oxidation behavior in Si NWs would be an important issue. For example, it is widely known that atomic scale roughness at the dielectric (SiOx)/channel (Si) interface can significantly affect the device performance in the nano-scale devices. However, the oxidation process at the atomic-scale is still unknown because of its complexity. In the present work, we investigated the oxidation behavior of Si NW in atomic scale by simulating the dry oxidation process using a reactive molecular dynamics simulation technique. We focused on the residual stress evolution during oxidation to understand the stress effect on oxidation behavior of Si NWs having two different diameters, 5 nm and 10 nm. We calculated the charge distribution according to the oxidation time for 5 and 10 nm Si NWs. Judging from this data, it was observed that the surface oxide layer started to form before it is fully oxidized, i.e., the active diffusion of oxygen in the surface oxide layer. However, it is well-known that the oxide layer formation on the Si NWs results in a compressive stress on the surface which may retard the oxygen diffusion. We focused on the stress evolution of Si NWs during the oxidation process. Since the surface oxidation results in the volume expansion of the outer shell, it shows a compressive stress along the oxide layer. Interestingly, the stress for the 10 nm Si NW exhibits larger compressive stress than that of 5 nm Si NW. The difference of stress level between 5 an 10 anm Si NWs is approximately 1 or 2 GPa. Consequently, the diameter of Si NWs could be a significant factor to determine the self-limiting oxidation behavior of Si NWs when the diameter was very small.