• 한국전기전자재료학회:학술대회논문집
• /
• 한국전기전자재료학회 1999년도 춘계학술대회 논문집
• /
• pp.677-680
• /
• 1999

Rapid developing automation technology enhances the need of sensors. Among many materials, silicon has the advantages of electrical and mechanical property, Single-crystalline silicon has different piezoresistivity on 야fferent directions and a current leakage at elevated temperature, but poly-crystalline silicon has the possibility of controling resistivity using dopping ions, and operation at high temperature, which is grown on insulating layers. Each wafer has slightly different thicknesses that make difficult to obtain the precisely same thickness of a diaphragm. This paper deals with the fabrication process to make poly-crystalline silicon based pressure sensors which includes diaphragm thickness and wet-etching techniques for each layer. Diaphragms of the same thickness can be fabricated consisting of deposited layers by silicon bulk etching. HF etches silicon nitride, HNO$_3$+HF does poly -crystalline silicon at room temperature very fast. Whereas ethylenediamice based etchant is used to etch silicon at 11$0^{\circ}C$ slowly.

• 한국전기전자재료학회:학술대회논문집
• /
• 한국전기전자재료학회 2001년도 하계학술대회 논문집
• /
• pp.874-877
• /
• 2001

SOI(Silicon-On-Insulator) technology is proposed as an alternative to bulk silicon for MEMS(Micro Electro Mechanical System) manufacturing. In this paper, we fabricated the SOI wafer with uniform active layer thickness by silicon direct bonding and mechanical polishing processes. Specially-designed electrostatic bonding system is introduced which is available for vacuum packaging and silicon-glass wafer bonding for SOG(Silicon On Glass) wafer. We demonstrated thermopile sensor and RF resonator using the SOI wafer, which has the merits of simple process and uniform membrane fabrication.

• 한국전기전자재료학회논문지
• /
• 제19권4호
• /
• pp.334-338
• /
• 2006

Poly silicon TFT requires high quality dielectric film; conventional method of growing silicon dioxide needs highly hazardous chemicals such as silane. We have grown high quality dielectric film of silicon dioxide using non-hazardous chemical such as TFOS and ozone as reaction gases by APCVD. The films grown were characterized through C-V curves of MOS structures. Conventional APCVD requires high temperature processing where as in the process of current study, we developed a low temperature process. Interface trap density was substantially decreased in the silicon surface coated with the silicon dioxide film after annealing in nitrogen ambient. The interface with such low trap density could be used for poly silicon TFT fabrication with cheaper cost and potentially less hazards.

• 한국전기전자재료학회:학술대회논문집
• /
• 한국전기전자재료학회 1992년도 춘계학술대회 논문집
• /
• pp.42-45
• /
• 1992

The poly silicon thin films were prepared by solid phase crystallization at 600$^{\circ}C$ of amorphous silicon films deposited on Corning 7059 glass and (100) silicon wafer with thermally grown SiO$_2$substrate by plasma enhanced chemical vapor deposition with varying rf power, deposition temperature, total flow rate. Crystallization time, microstructure, absorption coefficients were investigated by RAMAN, XRD analysis and UV transmittance measurement. Crystallization time of amorphous silicon films was increased with increasing rf power, decreasing deposition temperature and decreasing total flow rate.

• 한국전기전자재료학회:학술대회논문집
• /
• 한국전기전자재료학회 2000년도 영호남학술대회 논문집
• /
• pp.25-28
• /
• 2000

A capacitance-type humidity sensors in which porous silicon layer is used as humidity-sensing material was developed. This sensors was fabricated monolithically to be compatible with the typical IC process technology except for the formation of porous silicon layer. As the sensors is made as a mesa structure, the correct measurement of capacitance is expected because it can remove the effect of the parasitic capacitance from the bottom layer and another junctions. To do this, the sensor was fabricated using process steps such as localized formation of porous silicon, oxidation of porous silicon layer and etching of oxidized porous silicon layer. From completed sensors, capacitance response was measured on the relative humidity of 25 to 95% at room temperature. As the result the measured capacitance showed the increase over 300% at the low frequency of 120Hz, and showed little dependence on the temperature between 10 to $40^{\circ}C$.

• 한국전기전자재료학회:학술대회논문집
• /
• 한국전기전자재료학회 2003년도 하계학술대회 논문집 Vol.4 No.1
• /
• pp.147-150
• /
• 2003

In this paper, We fabricated a high temperature pressure sensor using SBD(silicon- direct-bonding) wafer of $Si/SiO_2$/Si-sub structure. This sensor was very sensitive because the piezoresistor is fabricated by single crystal silicon of the first layer of SDB wafer. Also, it was possible to operate the sensor at high temperature over $120^{\circ}C$ which is the temperature limitation of general silicon sensor because the piezoresistor was dielectric isolation from silicon substrate using silicon dioxide of the second layer. The sensitivity of this sensor is very high as the measured result of D2200 shows $183.6\;{\mu}V/V{\cdot}kPa$. Also, the output characteristic of linearity was very good. This sensor was available at high temperature as $300^{\circ}C$.

• Current Photovoltaic Research
• /
• 제6권2호
• /
• pp.31-38
• /
• 2018

Multijunction solar cells present a practical solution towards a better photovoltaic conversion for a wider spectral range. In this review, we compare different types of multi-ijunction solar cell. First, we introduce thin film multijunction solar cell include to the thin film silicon, III-V material and chalcopyrite material. Until now the maximum reported power conversion efficiencies (PCE) of solar cells having different component sub-cells are 14.0% (thin film silicon), 46% (III-V material), 4.4% (chalcopyrite material) respectively. We then discuss the development of multijunction solar cell in which c-Si is used as bottom sub-cell while III-V material, thin film silicon, chalcopyrite material or perovskite material is used as top sub-cells.

• 공업화학
• /
• 제26권1호
• /
• pp.80-85
• /
• 2015

본 연구에서는 리튬이차전지의 음극활물질인 실리콘/탄소 복합소재를 제조하여 전기화학적 특성을 확인하였다. 실리콘/탄소 합성물은 마그네슘의 열 환원 반응을 통해 SBA-15 (Santa Barbara Amorphous material No. 15)를 제조한 후 페놀 수지의 탄화 과정을 통해 합성하였다. 실리콘/탄소를 음극으로 제조하여 충방전, 사이클, 순환전압전류, 임피던스 테스트를 통해 분석하였다. 실리콘에 코팅된 탄소는 전기 전도도를 향상시켜 Rct값을 235 ohm (silicon)에서 30 ohm (실리콘/탄소)으로 낮추었고 리튬의 탈 삽입 시에 발생하는 실리콘의 팽창을 억제하여 전극을 안정화시키는 효과를 보여주었다. 실리콘/탄소 전극을 사용한 리튬이차전지는 1,348 mAh/g의 용량을 나타내었고 50사이클 동안 76%의 안정성을 보여주었다.

• Bulletin of the Korean Chemical Society
• /
• 제26권12호
• /
• pp.1927-1928
• /
• 2005

• 한국전기전자재료학회:학술대회논문집
• /
• 한국전기전자재료학회 2000년도 영호남학술대회 논문집
• /
• pp.7-12
• /
• 2000

This paper presents the electrochemical etch-stop characteristics of single-crystal silicon in a tetramethyl ammonium hydroxide(TMAH):isopropyl alcohol(IPA):pyrazine solution. Addition of pyrazine to a TMAH:IPA etchant increases the etch-rate of (100) silicon, thus the elapsed time for etch-stop was shortened. The current-voltage (I-V) characteristics of n- and p-type silicon in a TMAH:IPA:pyrazine solution were obtained, respectively. Open circuit potential(OCP) and passivation potential(PP) of n- and p-type silicon, respectively, were obtained and applied potential was selected between n- and p-type silicon PP. The electrochemical etch-stop is applied to the fabrication of 801 microdiaphragms having $20{\mu}m$ thickness on a 5-inch silicon wafer. The averge thicknesses of 801 microdiaphragms fabricated on the one wafer were $20.03{\mu}m$ and standard deviation was ${\pm}0.26{\mu}m$. The silicon surface of the etch-stopped microdiaphragm was extremely flat without noticeable taper or other nonuniformities. The benefits of the electrochemical etch-stop in a TMAH:IPA:pyrazine solution become apparent when reproducibility in the microdiaphragm thickness for mass production is considered. These results indicate that the electrochemical etch-stop in a TMAH:IPA:pyrazine solution provides a powerful and versatile alternative process for fabricating high-yield silicon microdiaphragms.