• Journal of Institute of Control, Robotics and Systems
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• v.13 no.4
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• pp.385-391
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• 2007

A class D digital audio amplifier with small size, low cost, and high quality is positively necessary in the multimedia era. Since the digital audio amplifier is based on the PWM signal processing, it is improper to analyze the principle of signal generation using linear system theories. In this paper, a class D digital audio amplifier based ADSM (Advanced Delta-Sigma Modulation) is considered. We first model the digital audio amplifier and then explain the operation principle using variable structure control algorithm. Moreover, the ripple signal generated by the hysteresis in the comparator has a significant effect on the system performance. Thus, we present a method to find the magnitude and the frequency of the ripple signal using describing function. Finally, simulations and experiments are provided to show the validity of the proposed methods.

• International Journal of Control, Automation, and Systems
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• v.1 no.4
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• pp.412-430
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• 2003

In many practical problems in signal processing and control, the signal values are often restricted to belong to a finite number of levels. These questions are generally referred to as "finite alphabet" problems. There are many applications of this class of problems including: on-off control, optimal audio quantization, design of finite impulse response filters having quantized coefficients, equalization of digital communication channels subject to intersymbol interference, and control over networked communication channels. This paper will explain how this diverse class of problems can be formulated as optimization problems having finite alphabet constraints. Methods for solving these problems will be described and it will be shown that a semi-closed form solution exists. Special cases of the result include well known practical algorithms such as optimal noise shaping quantizers in audio signal processing and decision feedback equalizers in digital communication. Associated stability questions will also be addressed and several real world applications will be presented.

• Journal of Power Electronics
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• v.14 no.4
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• pp.796-805
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• 2014

A digital controller with a low-power approach for point-of-load synchronous buck converters is discussed and compared with its analog counterpart to confirm its feasibility for system integration. The tri-mode digital controller IC in $0.35{\mu}m$ CMOS process is presented to demonstrate solutions that include a PID, quarter PID, and robust RST compensators. These compensators address the steady-state, stand-by, and transient modes according to the system operating point. An idle-tone free condition for ${\Sigma}-{\Delta}$ DPWM reduces the inherent tone noise under DC-excitation. Compared with that of the traditional approach, this condition generates a quasi-pure modulation signal. Experimental results verify the closed-loop performances and confirm the power-saving mechanism of the proposed controller.

• Journal of Sensor Science and Technology
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• v.25 no.5
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• pp.326-332
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• 2016

A novel CMOS temperature sensor with binary output is implemented by using fully differential switched-capacitor circuits for resistorless implementation of the temperature sensor core. Temperature sensing is based on the temperature characteristics of the pn diodes implemented by substrate pnp transistors fabricated using standard CMOS processes. The binary outputs are generated by using the charge-balance principle that eliminates the division operation of the PTAT voltage by the bandgap reference voltage. The chip was designed in a MagnaChip $0.35-{\mu}m$ CMOS process, and the designed circuit was verified using Spectre circuit simulations. The verified circuit was laid out in an area of $950{\mu}m{\times}557 {\mu}m$ and is currently under fabrication.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.42 no.10 s.340
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• pp.39-46
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• 2005

A DC-DC converter with digital controller is realized. the digital controller has several advantages such as robustness, fast design time, and high flexibility. however, since the DC-DC output voltage is analog, an analog-to-digital conversion scheme is always essential in all digital controllers. A simple and efficient delta-sigma modulator is used as a conversion scheme in out implementation. The measurement results show good voltage regulation

• The Korean Journal of Pharmacology
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• v.24 no.2
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• pp.153-164
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• 1988

The potential role of endogenous opioid peptides (EOPS) in cardiovascular regulation has only recently been entertained. EOPS have been localized in brain, spinal cord, autonomic ganglia, particularly the adrenal gland, and many other peripheral tissues. There are at least five major types of opioid receptors; namely ${\mu},\;{\delta},\;k,\;{\sigma},\;and\;{\varepsilon}$ and Experimental evidence indicates that cardiovascular actions of the peptide are mediated primarily by ${\mu},\;{\delta}$ and k receptors, and that these receptor types may be allosterically coupled. In anesthetized rabbits met-enkephalin decreased blood pressure and heart rate, which closely paralleled a reduction in sympathetic discharge. Naloxone, but not naloxone methobromide, antagonized these effects, which suggests a central site of action of met-enkephalin. A number of autonomic agents, particularly adrenergic ${\alpha}$-and, ${\beta}-agonists$ and antagonists modify the cardiovascular actions of met-enkephalin. Experiments in reserpine-treated and adrenalectomized rats provide no evidence of sympathetic nervous system involvement in the pressor responses to intravenous injection of opioid peptides, but rather suggest a direct peripheral action. Finally, activation of a beta-endorphinergic pathway projecting from the arcuate nucleus to the nucleus tractos solitarii in rats can cause naloxone reversible hypotension and bradycardia. There is evidence to implicate this pathway in antihypertensive drug action and in the modulation of baroreflex activity.

• Journal of the Institute of Electronics and Information Engineers
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• v.53 no.2
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• pp.27-35
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• 2016

A Low jitter dual output frequency synthesizer for smart audio devices is described in this paper. It has been fabricated in a 1.8 V Dongbu $0.18-{\mu}m$ CMOS process. Output frequency is controlled by 3 rd order Sigma-Delta Modulation and digital divider. The frequency synthesizer has a size of $0.6mm^2$, frequency range of 0.6-200 MHz, loop bandwidth of 350 kHz, and rms jitter of 11.4 ps-21.6 ps.

• Journal of electromagnetic engineering and science
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• v.14 no.3
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• pp.284-292
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• 2014

This paper presents a characteristic evaluation of commercial gallium nitride (GaN) transistors having two different gate-lengths of $0.4-{\mu}m$ and $0.25-{\mu}m$ in the design of a class-S power amplifier (PA). Class-S PA is operated by a random pulse-width input signal from band-pass delta-sigma modulation and has to deal with harmonics that consider quantization noise. Although a transistor having a short gate-length has an advantage of efficient operation at higher frequency for harmonics of the pulse signal, several problems can arise, such as the cost and export license of a $0.25-{\mu}m$ transistor. The possibility of using a $0.4-{\mu}m$ transistor on a class-S PA at 955 MHz is evaluated by comparing the frequency characteristics of GaN transistors having two different gate-lengths and extracting the intrinsic parameters as a shape of the simplified switch-based model. In addition, the effectiveness of the switch model is evaluated by currentmode class-D (CMCD) simulation. Finally, device characteristics are compared in terms of current-mode class-S PA. The analyses of the CMCD PA reveal that although the efficiency of $0.4-{\mu}m$ transistor decreases more as the operating frequency increases from 955 MHz to 3,500 MHz due to the efficiency limitation at the higher frequency region, it shows similar power and efficiency of 41.6 dBm and 49%, respectively, at 955 MHz when compared to the $0.25-{\mu}m$ transistor.