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http://dx.doi.org/10.6113/JPE.2014.14.4.796

Digital Controller Candidate for Point-of-load Synchronous Buck Converter in Tri-mode Mechanism  

Xiu, Li-Mei (School of Information and Electronics, Beijing Institute of Technology)
Zhang, Wei-Ping (College of Mechanical and Electrical Engineering, North China University of Technology)
Li, Bo (Institute of Microelectronics of Chinese Academy of Science)
Liu, Yuan-Sheng (College of Information Technology, Beijing Union University)
Publication Information
Journal of Power Electronics / v.14, no.4, 2014 , pp. 796-805 More about this Journal
Abstract
A digital controller with a low-power approach for point-of-load synchronous buck converters is discussed and compared with its analog counterpart to confirm its feasibility for system integration. The tri-mode digital controller IC in $0.35{\mu}m$ CMOS process is presented to demonstrate solutions that include a PID, quarter PID, and robust RST compensators. These compensators address the steady-state, stand-by, and transient modes according to the system operating point. An idle-tone free condition for ${\Sigma}-{\Delta}$ DPWM reduces the inherent tone noise under DC-excitation. Compared with that of the traditional approach, this condition generates a quasi-pure modulation signal. Experimental results verify the closed-loop performances and confirm the power-saving mechanism of the proposed controller.
Keywords
CMOS integrated circuit; DC-DC converter; Digital control; Digital pulse width modulator; System on-chip;
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