• 전기학회논문지
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• 제58권7호
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• pp.1363-1374
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• 2009

This paper reviews the characteristics and technical trends in Power MOSFET technology that are leading to improvements in power loss for power electronic system. The silicon bipolar power transistor has been displaced by silicon power MOSFET's in low and high voltage system. The power electronic technology requires the marriage of power device technology with MOS-gated device and bipolar analog circuits. The technology challenges involved in combining power handling capability with finger gate, trench array, super junction structure, and SiC transistor are described, together with examples of solutions for telecommunications, motor control, and switch mode power supplies.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2009년도 춘계학술대회 논문집
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• pp.37-38
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• 2009

SiC power device possesses attractive features, such as high breakdown voltage, high-speed switching capability, and high temperature operation. In general, device design has a significant effect on the switching characteristics. It is known that in SiC power MOSFET, the JFET region width is one of the most important parameters. In this paper, we demonstrated that the switching performance of DMOSFET is dependent on the with width of the JFET region by using 2-D Mixed-mode simulations. The 4H-SiC DMOSFETs with a JFET region designed to block 800 V were optimized for minimum loss by adjusting the parameters of the n JFET region, CSL, and n-drift layer. It has been found that the JFET region reduces specific on-resistance and therefore the switching characteristics depend on the JFET region.

• 한국전자파학회논문지
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• 제24권2호
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• pp.128-135
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• 2013

본 논문에서는 Si가 도핑된 Modulation-doped AlGaN/GaN 이종 접합 구조를 가지는 전력증폭기용 MISHFET 소자를 제작하였다. 제작된 GaN TR 소자는 6H-SiC(0001)의 Substrate 위에 성장시켰으며, 180 nm의 gate length를 가진다. 제작된 소자를 측정한 결과, 837 mA/mm의 최대 드레인 전류 특성, 177 mS/mm의 $g_m$(Tranconductance)을 가지며, $f_T$는 45.6 GHz, $f_{MAX}$는 46.5 GHz로 9.3 GHz에서 1.54 W/mm의 전력 밀도와 40.24 %의 PAE를 가지는 것으로 확인되었다.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2004년도 하계학술대회 논문집 Vol.5 No.1
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• pp.353-356
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• 2004

This paper discribes the analysis of the I-V characteristics of 4H-SiC DiMOSFET with single epi-layer Silicon Carbide has been around for over a century. However, only in the past two to three decades has its semiconducting properties been sufficently studied and applied, especially for high-power and high frequency devices. We present a numerical simulation-based optimization of DiMOSFET using the general-purpose device simulator MINIMIS-NT. For simulation, a loin thick drift layer with doping concentration of $5{\times}10^{15}/cm^3$ was chosen for 1000V blocking voltage design. The simulation results were used to calculate Baliga's figure of Merit (BFOM) as the criterion structure optimization and comparison.

• JSTS:Journal of Semiconductor Technology and Science
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• 제14권6호
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• pp.697-705
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• 2014

A single chip Programmable AC to DC Power Converter, consisting of wide band gap SiC MOSFET and SiC diodes, has been proposed which converts high frequency ac voltage to a conditioned dc output voltage at user defined given power level. The converter has high conversion efficiency because of negligible reverse recovery current in SiC diode and SiC MOSFET. High frequency operation reduces the need of bigger size inductor. Lead inductors are enough to maintain current continuity. A complete electrical analysis, die area estimation and thermal analysis of the converter has been presented. It has been found that settling time and peak overshoot voltage across the device has reduced significantly when SiC devices are used with respect to Si devices. Reduction in peak overshoot also increases the converter efficiency. The total package substrate dimension of the converter circuit is only $5mm{\times}5mm$. Thermal analysis performed in the paper shows that these devices would be very useful for use as miniaturized power converters for load currents of up to 5-7 amp, keeping the package thermal conductivity limitation in mind. The converter is ideal for voltage requirements for sub-5 V level power supplies for high temperatures and space electronics systems.

• 전력전자학회논문지
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• 제28권1호
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• pp.39-47
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• 2023

This paper applies a structural technique with uniform parallel switch characteristics in gates and power loops to minimize the ringing and current imbalance that occurs when a general discrete package (TO-247)-based power semiconductor device is operated in parallel. Also, this propose a heat sink integrated switching module with heat sink design flexibility and high power density. The developed heat dissipation-integrated switching module verifies the symmetry of the parasitic inductance of the parallel switch through Q3D by ansys and the validity of the structural technique of the parallel switch using the LLC resonant converter experiment operating at a rated capacity of 7.5 kW.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2010년도 하계학술대회 논문집
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• pp.352-352
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• 2010

Silicon Carbide (SiC) power device possesses attractive features, such as high breakdown voltage, high-speed switching capability, and high temperature operation. In general, device design has a significant effect on the switching characteristics. In this paper, we report the effect of the P-base doping concentration ($N_{PBASE}$) on the transient characteristics of 4H-SiC DMOSFETs. By reducing $N_{PBASE}$, switching time also decreases, primarily due to the lowered channel resistance. It is found that improvement of switching speed in 4H-SiC DMOSFETs is essential to reduce the and channel resistance. Therefore, accurate modeling of the operating conditions are essential for the optimization of superior switching performance.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2004년도 추계학술대회 논문집 Vol.17
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• pp.3-6
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• 2004

반도체 디자인, 공정 기술 및 패기지 기술의 발달에 따라 전력용 반도체는 소형화, 고성능화, 지능화하고 있다. 고속 구동이 용이한 때문에 MOSFET이나 IGBT등의 MOS-gate형 전력 반도체의 발전이 두드려지며, trench, charge balance, NPT 기술등이 패키지 기술과 더불어 이를 위한 주요 기술이 될것으로 보인다. SiC나 GaN등의 Wide Band Gap 물질들을 사용한 차세대 전력 반도체 연구도 활발히 진행되고 있다.

• 한국전기전자재료학회논문지
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• 제19권4호
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• pp.344-349
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• 2006

A sublimation epitaxial method, referred to as the Closed Space Technique (CST) was adopted to produce thick SiC epitaxial layers for power device applications. We aimed to systematically investigate the dependence of SiC epilayer quality and growth rate during the sublimation growth using the CST method on various process parameters such as the growth temperature and working pressure. The etched surface of a SiC epitaxial layer grown with low growth rate $(30{\mu}m/h)$ exhibited low etch pit density (EPD) of ${\sim}2000/cm^2$ and a low micropipe density (MPD) of $2/cm^2$. The etched surface of a SiC epitaxial layer grown with high growth rate (above $100{\mu}m/h$) contained a high EPD of ${\sim}3500/cm^2$ and a high MPD of ${\sim}500/cm^2$, which indicates that high growth rate aids the formation of dislocations and micropipes in the epitaxial layer. We also investigated the Schottky barrier diode (SBD) characteristics including a carrier density and depletion layer for Ni/SiC structure and finally proposed a MESFET device fabricated by using selective epilayer process.

• 한국정보전자통신기술학회논문지
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• 제12권5호
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• pp.499-506
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• 2019

본 논문은 SiC Hybrid module를 적용한 7kW 인버터의 동작 안정성에 관한 것으로 손실 방정식과 시뮬레이션 결과를 비교하여 시뮬레이션 결과의 유효성을 검증하였으며, 시뮬레이션을 통해 Si module과 SiC Hybrid module의 스위치 손실과 다이오드 손실을 비교하였다. 손실 방정식 계산을 통하여 SiC Hybrid module의 도통 손실은 168W, 스위칭 손실은 9.3W, 다이오드 손실은 10.5nW의 결과를 나타내었으며, 시뮬레이션 결과와 비교하였을 때 유사한 값을 나타내었다. 이를 바탕으로 Si module과 SiC Hybrid module의 시뮬레이션 결과 값 비교 결과, Si module의 총 소자 손실값은 246.2W, SiC Hybrid module의 총 소자 손실 값은 189.9W를 나타내었으며, 손실 차이 값은 56.3W로써 약 0.8W의 효율 차이를 보였다. 이로 인하여 SiC SBD의 Reverse recovery 특성을 검증하였다. 또한 고온 포화상태에서 SiC Hybrid module 및 Si module의 안정성을 확인하기 위하여 온도 포화 테스트를 진행하였으며, Si module의 경우, 출력전력 4kW에서 동작을 멈추었고, SiC Hybrid module은 7kW까지 동작을 확인하였다. 이를 바탕으로, 효율 그래프와 온도 그래프를 제시하였으며, Si module은 4kW까지, SiC Hybrid module은 7kW까지 그래프로 나타내었다.