• Title/Summary/Keyword: SiC MOSFET

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Transformer Leakage Inductance Calculation Used in DAB Converters Considering the Influence of SiC MOSFET Parasitic Capacitance (SiC MOSFET 기생 커패시턴스의 영향을 고려한 DAB 컨버터에 사용되는 변압기의 누설인덕턴스 계산)

  • Cheol-Woong Choi;Jae-Sub Ko;Ji-Yong So;Dae-Kyong Kim
    • Journal of the Korean Society of Industry Convergence
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    • v.27 no.4_2
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    • pp.935-942
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    • 2024
  • This study analyzes the effects of the parasitic capacitance of the SiC MOSFET used in the Dual Active Bridge ( DAB) converter and proposes a method for calculating the leakage inductance of the transformer. The DAB converter employs high-frequency switching to achieve high efficiency, high power density, and reliability. MOSFETs possess parasitic capacitance, which induces resonance with the leakage inductance of the transformer during switching operations, resulting in a voltage change delay. This paper discusses the effect of the delay of voltage changes on the DAB converter output and proposes a method to calculate the delay time. This method aims to equalize the delay time to minimize this effect and enhance the accuracy of the leakage inductance calculation of the transformer. The proposed method is validated through experiments and simulations.

Design and Optimization of 4.5 kV 4H-SiC MOSFET with Current Spreading Layer (Current Spreading Layer를 도입한 4.5 kV 4H-SiC MOSFET의 설계 및 최적화)

  • Young-Hun, Cho;Hyung-Jin, Lee;Hee-Jae, Lee;Geon-Hee, Lee;Sang-Mo, Koo
    • Journal of IKEEE
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    • v.26 no.4
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    • pp.728-735
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    • 2022
  • In this work, we investigated a high-voltage (~4.5 kV) 4H-SiC power DMOSFET with modifications of current spreading layer (CSL), which was introduced below the p-well region for low on-resistance. These include the following: 1) a thickness of CSL (TCSL) from 0 um to 0.9 um; 2) a doping concentration of CSL (NCSL) from 1×1016 cm-3 to 5×1016 cm-3. The design is optimized using TCAD 2D-simulation, and we found that CSL helps to reduce specific on-resistance but also breakdown voltage. The resulting structures exhibit a specific on-resistance (Ron,sp) of 59.61 mΩ·cm2, a breakdown voltage (VB) of 5 kV, and a Baliga's Figure of Merit (BFOM) of 0.43 GW/cm2.

Development of 25kW Bi-directional Converter using SiC MOSFET for DC Nano-grid (SiC MOSFET을 이용한 DC Nano-grid용 25kW급 양방향 컨버터 개발)

  • Kim, Yeonwoo;Han, Byeonggill;Kim, Minjae;Choi, Sewan;Yang, Daeki;Kim, Minkook;Oh, Seongjin
    • Proceedings of the KIPE Conference
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    • 2016.07a
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    • pp.44-45
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    • 2016
  • 본 논문에서는 DC Nano-grid를 위한 25kW급 고효율 양방향 컨버터를 개발하였다. 제안하는 양방향 컨버터는 넓은 입력전압 범위를 만족하기 위하여 Cascade 부스트-벅 컨버터의 구조로 하였으며 상용화된 SiC MosFET기반 3레그 IPM을 최적으로 사용하기 위해 2상 인터리빙 부스트 컨버터와 단상 벅 컨버터로 하였다. 또한 승 강압 모드에 따라 스위칭하는 스위치 개수를 감소시켜 스위칭 손실을 최소화 하였다. 25kW 시작품을 통해 14kW에서 효율 98.9%를 달성하였다.

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Simulation Characteristics of 1200V SiC DMOSFET Devices (1200V급 SiC DMOSFET 제작을 위한 특성 Simulation)

  • Kim, Sang-Cheol;Joo, Sung-Jae;Kang, In-Ho;Bahng, Wook;Kim, Nam-Kyun
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2009.04b
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    • pp.99-100
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    • 2009
  • 탄화규소를 이용한 1200V급 MOSFET 소자 제작을 위하여 특성 simulation을 수행하였다. 1200V 내압을 얻기 위해서 불순물 농도가 5E15/cm3이고 에피층의 두께가 12um인 상용 탄화규소 웨이퍼를 기준으로 하였으며 채널 저항을 줄이기 위해 채널길이를 $0.5{\mu}m$로 하였다. 게이트전압이 13V, 드레인 전압이 4V에서 specific on-resistance 값은 $12m\;{\Omega}cm^2$로 매우 우수한 특성을 보이고 있다. P-body의 표면 농도를 5E16/cm3 에서 1E18/cm3으로 변화시키면서 소자의 전기적 특성을 예측하였으며 실험 결과와 비교하여 특성 변수를 추출하였다.

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Development of 200kW class electric vehicle traction motor driver based on SiC MOSFET (SiC MOSFET기반 200kW급 전기차 구동용 모터드라이버 개발)

  • Yeonwoo, Kim;Sehwan, Kim;Minjae, Kim;Uihyung, Yi;Sungwon, Lee
    • Journal of IKEEE
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    • v.26 no.4
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    • pp.671-680
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    • 2022
  • In this paper, A 200kW traction motor driver that covers most of the traction motor specification of commercial electric vehicles (EV) is developed. In order to achieve high efficiency and high power density, a next-generation power semiconductors (Silicon carbide, SiC) are applied instead of power semiconductor(IGBT), which is Si based. Through hardware analysis for optimal use of SiC, expected efficiency and heat dissipation characteristics are obtained. A vector control algorithm for an IPMSM (Interior permanent magnet synchronous motor), which is mostly used in EV(Electric vehicle) traction motor, is implemented using DSP (Digital signal processor). In this paper, a prototype traction motor driver based SiC for EV is designed and manufactured, and its performance is verified through experiments.

Silicon-Wafer Direct Bonding for Single-Crystal Silicon-on-Insulator Transducers and Circuits (단결정 SOI트랜스듀서 및 회로를 위한 Si직접접합)

  • Chung, Gwiy-Sang;Nakamura, Tetsuro
    • Journal of Sensor Science and Technology
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    • v.1 no.2
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    • pp.131-145
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    • 1992
  • This paper has been described a process technology for the fabrication of Si-on-insulator(SOI) transducers and circuits. The technology utilizes Si-wafer direct bonding(SDB) and mechanical-chemical(M-C) local polishing to create a SOI structure with a high-qualify, uniformly thin layer of single-crystal Si. The electrical and piezoresistive properties of the resultant thin SOI films have been investigated by SOI MOSFET's and cantilever beams, and confirmed comparable to those of bulk Si. Two kinds of pressure transducers using a SOI structure have been proposed. The shifts in sensitivity and offset voltage of the implemented pressure transducers using interfacial $SiO_{2}$ films as the dielectrical isolation layer of piezoresistors were less than -0.2% and +0.15%, respectively, in the temperature range from $-20^{\circ}C$ to $+350^{\circ}C$. In the case of pressure transducers using interfacial $SiO_{2}$ films as an etch-stop layer during the fabrication of thin Si membranes, the pressure sensitivity variation can be controlled to within a standard deviation of ${\pm}2.3%$ from wafer to wafer. From these results, the developed SDB process and the resultant SOI films will offer significant advantages in the fabrication of integrated microtransducers and circuits.

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Reducing Overshoot Voltage of SiC MOSFET in Grid-Connected Hybrid Active NPC Inverters (계통 연계형 Hybrid Active NPC 인버터의 SiC MOSFET 오버슈트 전압 저감)

  • Lee, Deog-Ho;Kim, Ye-Ji;Kim, Seok-Min;Lee, Kyo-Beum
    • The Transactions of the Korean Institute of Power Electronics
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    • v.24 no.6
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    • pp.459-462
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    • 2019
  • This work presents methods for reducing overshoot voltages across the drain-source of silicon carbide (SiC) MOSFETs in grid-connected hybrid active neutral-point-clamped (ANPC) inverters. Compared with 3-level NPC-type inverter, the hybrid ANPC inverter can realize the high efficiency. However, SiC MOSFETs conduct its switching operation at high frequencies, which cause high overshoot voltages in such devices. These overshoot voltages should be reduced because they may damage switching devices and result in electromagnetic interference (EMI). Two major strategies are used to reduce the overshoot voltages, namely, adjusting the gate resistor and using a snubber capacitor. In this paper, advantages and disadvantages of these methods will be discussed. The effectiveness of these strategies is verified by experimental results.

Analysis of Switching Clamped Oscillations of SiC MOSFETs

  • Ke, Junji;Zhao, Zhibin;Xie, Zongkui;Wei, Changjun;Cui, Xiang
    • Journal of Power Electronics
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    • v.18 no.3
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    • pp.892-901
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    • 2018
  • SiC MOSFETs have been used to improve system efficiency in high frequency converters due to their extremely high switching speed. However, this can result in undesirable parasitic oscillations in practical systems. In this paper, models of the key components are introduced first. Then, theoretical formulas are derived to calculate the switching oscillation frequencies after full turn-on and turn-off in clamped inductive circuits. Analysis indicates that the turn-on oscillation frequency depends on the power loop parasitic inductance and parasitic capacitances of the freewheeling diode and load inductor. On the other hand, the turn-off oscillation frequency is found to be determined by the output parasitic capacitance of the SiC MOSFET and power loop parasitic inductance. Moreover, the shifting regularity of the turn-off maximum peak voltage with a varying switching speed is investigated on the basis of time domain simulation. The distortion of the turn-on current is theoretically analyzed. Finally, experimental results verifying the above calculations and analyses are presented.

Influence of Device Parameters Spread on Current Distribution of Paralleled Silicon Carbide MOSFETs

  • Ke, Junji;Zhao, Zhibin;Sun, Peng;Huang, Huazhen;Abuogo, James;Cui, Xiang
    • Journal of Power Electronics
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    • v.19 no.4
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    • pp.1054-1067
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    • 2019
  • This paper systematically investigates the influence of device parameters spread on the current distribution of paralleled silicon carbide (SiC) MOSFETs. First, a variation coefficient is introduced and used as the evaluating norm for the parameters spread. Then a sample of 30 SiC MOSFET devices from the same batch of a well-known company is selected and tested under the same conditions as those on datasheet. It is found that there is big difference among parameters spread. Furthermore, comprehensive theoretical and simulation analyses are carried out to study the sensitivity of the current imbalance to variations of the device parameters. Based on the concept of the control variable method, the influence of each device parameter on the steady-state and transient current distributions of paralleled SiC MOSFETs are verified separately by experiments. Finally, some screening suggestions of devices or chips before parallel-connection are provided in terms of different applications and different driver configurations.