• Journal of Power Electronics
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• 제19권6호
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• pp.1449-1457
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• 2019

This paper presents two voltage domain stacking topologies for powering integrated digital loads such as multiprocessors or 3D integrated circuits. Pairs of loads and capacitors are connected in series to form a stack of voltage domains. The voltage is balanced by switching the position of the capacitors in one case and the position of the loads in the other case. This method makes the voltage regulation robust to large differential load power consumption. The first configuration can be named the load stacking topology. The second configuration can be named the capacitor stacking topology. This paper aims at proposing and comparing these two topologies. Models of both topologies and a switching scheme are presented. The behavior, control scheme, losses and overall performance are analyzed and compared theoretically in simulation and experiments. Experimental results show that the capacitor stacking topology has better performance with a 30% voltage ripple reduction.

• Journal of information and communication convergence engineering
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• 제15권1호
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• pp.62-71
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• 2017

This paper presents a low-power voltage converter based on a reconfigurable capacitor array. Its energy recycling capacitor array stores the energy during a charge stage and supplies the voltage during an energy recycle stage even after the power source is disconnected. The converter reconfigures the capacitor array step-wise to boost the lost voltage level during the energy recycle stage. Its energy saving is particularly effective when most of the energy remaining in the charge capacitors is wasted by the leakage current during a longer sleep period. Simulations have been conducted using a voltage source of 500 mV to supply a $V_{DD}$ of around 800 mV to a load circuit consisting of four 32-bit adders in a 65-nm CMOS process. Results demonstrate energy recycling efficiency of 85.86% and overall energy saving of 40.14% compared to a conventional converter, when the load circuit is shortly active followed by a long sleep period.

• Journal of Power Electronics
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• 제15권6호
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• pp.1468-1479
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• 2015

Renewable energy resources such as wind and photovoltaic power generation systems demand a high step-up DC-DC converters to convert the low voltage to commercial grid voltage. However, the high step-up converter using a transformer has limitations of high voltage stresses of switches and diodes when the transformer winding ratio increases. Accordingly, conventional studies have been applied to series-connect multioutput converters such as forward-flyback and switched-capacitor flyback to reduce the transformer winding ratio. This paper proposes new single-ended converter topologies of an isolation type and a non-isolation type to improve power efficiency, cost-effectiveness, and output ripple. The first proposal is an isolation-type charge-pump switched-capacitor flyback converter that includes an extreme-ratio isolation switched-capacitor cell with a chargepump circuit. It reduces the transformer winding number and the output ripple, and further improves power efficiency without any cost increase. The next proposal is a non-isolation charge-pump switched-capacitor-flyback tapped-inductor boost converter, which adds a charge-pump-connected flyback circuit to the conventional switched-capacitor boost converter to improve the power efficiency and to reduce the efficiency degradation from the input variation. In this paper, the operation principle of the proposed scheme is presented with the experimental results of the 100 W DC-DC converter for verification.

• 전기학회논문지P
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• 제61권4호
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• pp.186-191
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• 2012

DC Bus Electrolytic capacitors have been widely used in power conversion system because they can achieve high capacitance and voltage ratings with volumetric efficiency and low cost. This type of capacitors have been traditionally used for filtering, voltage smoothing, by-pass and other many applications in power conversion circuits requiring a cost effective and volumetric efficiency components. Unfortunately, electrolytic capacitors are some of the weakest components in power electronic converter. Many papers have proposed different methods or algorithms to determinate the ESR and/or capacitance C for fault diagnosis of the electrolytic capacitor. However, both ESR and C vary with frequency and temperature. Accurate knowledge of both values at the capacitors operating conditions is essential to achieve the best reference data of fault judgement. According to parameter analysis, the capacitance increases with temperature and the ESR decreases. Higher frequencies make the ESR and C to decrease. Analysis results show that the proposed electrolytic capacitor parameter estimation technique can be applied to reference signal of capacitor diagnosis systems successfully.

• 전자공학회논문지
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• 제53권10호
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• pp.123-130
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• 2016

고주파 유도가열장치는 LC 공진회로에 고주파 전원을 인가하여 금속을 가열 할 수 있다. 공진회로는 워크 코일과 전도 냉각 커패시터로 구성되며, 커패시터의 특성에 따라 열처리 설비의 성능을 좌우한다. 그러나 전도 냉각 커패시터는 국내 원천기술의 연구개발 부족으로 해외 수입 의존도가 높다. LC 공진 시 커패시터 내부의 발열을 최소화하고, 무효 전력손실을 줄이며, 내 전압특성이 우수한 커패시터가 요구된다. 국산화를 위하여, 선진 제조사의 완성품 커패시터의 주파수 응답 특성 분석에 대한 선행 연구가 필요하다. 주어진 로그-로그 특성 곡선의 임의 점에서 값을 읽기 위한 보간법을 연구하여 매틀랩 코딩으로 커패시터의 분석 도구로 적용하였다. 커패시터를 간단 화 된 RC 직렬 등가 회로로 가정하고, 등가 직렬 저항 ESL 값을 구하여 주파수 응답 특성 곡선을 재현하는 시뮬레이션을 시도하였다. 실제 무효전력의 피크 치에 대한 특성과 시뮬레이션 특성을 비교할 때 재현율이 83% 이상 결과 값으로 나타나는 것을 확인할 수 있었고, 이 알고리즘은 간단화 된 모델의 커패시터 특성곡선을 분석하여 예측 할 때 적용이 가능하다.

• 한국전기전자재료학회논문지
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• 제18권12호
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• pp.1133-1138
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• 2005

In this study, we have prepared, as the pluse power source, a commercially supplied Li-ion battery with a capacity of 700 mAh and AC resistivity of 60 md at 1 kHz and nonaqeous asymmetric hybrid capacitor composed of an activated carbon cathode and MCMB anode, and have examined the electrochemical characteristics of hybrid capacitor and the pulse performances of parallel connected hybrid capacitor/Li-ion battery source. The nonaqueous asymmetric hybrid capacitors constituted with each stack number of pairs composed of the cathode, the porous separator and the anode electrode were housed in Al-laminated film cell. The 10 stacked hybrid capacitor, which was charged and discharged at a constant current at 0.25 $mA/cm^2$ between 3 and 4.3 V, has exhibited the capacitance of 108F and the lowest equivalent series resistance was 32 $m{\Omega}$ at 1 kHz. On the other hand, the enhanced run time of Li-ion battery assisted by the hybrid capacitor was obtained with increasing of current density and pulse width in Pulse mode. The best improvement, $84\;\%$ for hybrid capacitor/Li-ion battery was obtained in the condition of a 7C-rate pulse (100 msec)/0.5C-rate standby/$10\;\%$ duty cycle.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2005년도 하계학술대회 논문집 Vol.6
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• pp.597-598
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• 2005

Recently, the performance of portable electric equipment can often improved by a Li-ion battery assisted by a supercapacitor. A supercapacitor can provide high power density as well as a low resistance in the hybrid system. In this study, we have prepared, as the pluse power souce, a commercially supplied Li-ion battery with a capacity of 700mAh and AC resistivity of $60m\Omega$ at 1kHz and nonaqeous asymmetric hybrid capacitor composed of an activated carbon cathode and MCMB anode, and have examined the electrochemical characteristics of hybrid capacitor and the pulse performances of parallel connected battery/hybrid capacitor source. The nonaqueous asymmetric hybrid capacitor, the stacks of 10 pairs of the cathode, the porous separator and the anode electrode were housed in Al-laminated film cell. The hybrid capacitor, which was charged and discharged at a constant current at $0.25mA/cm^2$ between 3 and 4.3V, has exhibited the capacitance of 100F. And the equivalent series resistance was $32m\Omega$ at 1kHz. By combining a Li-ion battery and a hybrid capacitor, the pulse performance of battery can be improved 23% in run time under a pulse discharge of 7C-rate.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2001년도 Proceedings ICPE 01 2001 International Conference on Power Electronics
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• pp.301-303
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• 2001

In this paper we present a Capacitor Charging Power Supply (CCPS) using a series-resonant three-level inverter topology to improve voltage regulation and use semiconductor switches having low blocking voltage capability such as MOSFETs. This inverter can be operated with two modes, Full Power Mode (FPM) and Half Power Mode (HPM). In FPM inverter supplies the high frequency step up transformer with full DC-link voltage and in HPM with half DC-link voltage. HPM switching method will be adopted when CCPS output voltage reaches the preset target value and operates in refresh mode-charge is maintained on the capacitor. In this topology each semiconductor devices blocks a half of the DC-link voltage[2]. A 15kW, 30kV CCPS has been built and will be tested for an electric precipitator application. The CCPS operates from an input voltage of 500VDC and has a variable output voltage between 10 to 30kV and 1kHz repetition rate at 44nF capacitive load [3]. A resonant frequency of 67.9kHz was selected and a voltage regulation of $0.83\%$ has been achieved through the use of half power mode without using the forced cut off the switch current [1]. The theory of operation, circuit topology and test results are given.

• 전기학회논문지
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• 제67권7호
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• pp.854-859
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• 2018

This paper describes the characteristics of a hybrid supercapacitor module for power quality stabilization. Hybrid supercapacitor is an promising energy storage device that positioned between conventional EDLC and Li-ion battery. A cylindrical 7500F hybrid supercapacitor ($60{\times}138mm$) was assembled by using the $Li_4Ti_5O_{12}$ electrode as an anode and activated carbon as a cathode. Considering the ESR and efficiency has been designed to module with 41.6F 480V design results in 180 series combination. In order to determine the characteristics of the hybrid supercapacitor module for power system, hybrid supercapacitor cells were connected in series with active balancing circuit. As a result of measuring the 50kw UPS, it was discharged at the current of 104A~143A during the discharge in the voltage range of 350V~480V, and the compensation time at discharge was measured to be about 30s. These results can be used to stabilization of power quality by applying hybrid supercapacitor module.

• Journal of Power Electronics
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• 제16권3호
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• pp.832-839
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• 2016

In this study, the performance of a direct current (DC)-DC buck converter is analyzed in the presence of non-idealities in passive components and semiconductor devices. The effect of these non-idealities on the various design issues of a DC-DC buck converter is studied. An improved expression for duty cycle is developed to compensate the losses that occur because of the non-idealities. The design equations for inductor and capacitor calculation are modified based on this improved expression. The effect of the variation in capacitor equivalent series resistance (ESR) on output voltage ripple (OVR) is analyzed in detail. It is observed that the value of required capacitance increases with ESR. However, beyond a maximum value of ESR (r_c,max), the capacitor is unable to maintain OVR within a specified limit. The expression of r_c,max is derived in terms of specified OVR and inductor current ripple. Finally, these theoretical studies are validated through MATLAB simulation and experimental results.