• 제어로봇시스템학회논문지
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• 제19권12호
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• pp.1072-1080
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• 2013

In a the present day, many vision inspection techniques are used in productive industrial areas. In particular, in the semiconductor industry the vision inspection system for wafers is a very important system. Also, inspection techniques for semiconductor wafer production are required to ensure high precision and fast inspection. In order to achieve these objectives, parallel processing of the inspection algorithm is essentially needed. In this paper, we propose the GPU (Graphical Processing Unit)-based parallel processing algorithm for the fast inspection of semiconductor wafers. The proposed algorithm is implemented on GPU boards made by NVIDIA Company. The defect detection performance of the proposed algorithm implemented on the GPU is the same as if by a single CPU, but the execution time of the proposed method is about 210 times faster than the one with a single CPU.

• 한국정밀공학회:학술대회논문집
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• 한국정밀공학회 1996년도 추계학술대회 논문집
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• pp.444-449
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• 1996

The semiconductor, which is precision product, requires many inspection processes. The surface conditions of the semiconductor chip affect on the functions of the semiconductors. The defects of the chip surface are cracks or voids. As general inspection method requires many inspection procedure, the inspection system which searches immediately and precisely the defects of the semiconductor chip surface is required. We suggest the detection algorithm for inspecting the surface defects of the semiconductor surface. The proposed algorithm first regards the semiconductor surface as random texture and point spread function, and secondly presents the character of texture by linear estimation theorem. This paper assumes that the gray level of each pixel of an image is estimated from a weighted sum of gray levels of its neighbor pixels by linear estimation theorem. The weight coefficients are determined so that the mean square error is minimized. The obtained estimation window(two-dimensional estimation window) characterizes the surface texture of semiconductor and is used to discriminate the defects of semiconductor surface.

• 반도체디스플레이기술학회지
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• 제19권3호
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• pp.12-18
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• 2020

In semiconductor manufacturing, defect detection is critical to maintain high yield. Currently, computer vision systems used in semiconductor photo lithography still have adopt to digital image processing algorithm, which often occur inspection faults due to sensitivity to external environment. Thus, we intend to handle this problem by means of using Mask R-CNN instead of digital image processing algorithm. Additionally, Mask R-CNN can be trained with image dataset pre-processed by means of the specific designed digital image filter to extract the enhanced feature map of Convolutional Neural Network (CNN). Our approach converged advantage of digital image processing and instance segmentation with deep learning yields more efficient semiconductor photo lithography inspection system than conventional system.

• 반도체디스플레이기술학회지
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• 제19권3호
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• pp.55-60
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• 2020

The hard mask photo-resist strip inspection system for the semiconductor wafer manufacturing process inspects the position of the circuit pattern formed on the wafer by measuring the distance from the edge of the wafer to the strip processing area. After that, it is an inspection system that enables you to check the process status in real time. Process defects can be significantly reduced by applying a tester that has not been applied to the existing wafer strip process, edge etching process, and wafer ashing process. In addition, it is a technology for localizing semiconductor process inspection equipment that can analyze the outer diameter of the wafer and the state of pattern formation, which can secure process stability and improve wafer edge yield.

• 대한기계학회:학술대회논문집
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• 대한기계학회 2003년도 추계학술대회
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• pp.1442-1447
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• 2003

Computer is a very powerful machine which is widely using for data processing, DB construction, peripheral device control, image processing etc. Consequently, many researches and developments have progressed for high performance processing unit, and other devices. Especially, the core units such as semiconductor parts are rapidly growing so that high-integration, high-performance, microminiat turization is possible. The packaging in the semiconductor industry is very important technique to de determine the performance of the system that the semiconductor is used. In this paper, the inspection of the inner defects such as delamination, void, crack, etc. in the semiconductor packages is studied. ESPI which is a non-contact, non-destructive, and full-field inspection method is used for the inner defect inspection and its results are compared with that of C-Scan method.

• JSTS:Journal of Semiconductor Technology and Science
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• 제12권1호
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• pp.34-40
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• 2012

We have developed a highly sensitive inspection technique based on an electron beam inspection for detecting the contact failure of a poly-Si plugged layer. It was difficult to distinguish the contact failure from normal landing plugs with high impedance. Normally, the thermal annealing method has been used to decrease the impedance of poly-Si plugs and this method increases the difference of charged characteristics and voltage contrast. However, the additional process made the loss of time and broke down the device characteristics. Here, the interval scanning method without thermal annealing was effectively applied to enhance the difference of surface voltage between well-contacted poly-Si plugs and incomplete contact plugs. It is extremely useful to detect the contact failures of non-annealed plug contacts with high impedance.

• 반도체디스플레이기술학회지
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• 제20권2호
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• pp.126-130
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• 2021

The ball grid array is one of the packaging methods that used in high density printed circuit board. Solder void defects caused by voids in the solder ball during the BGA process do not directly affect the reliability of the product, but it may accelerate the aging of the device on the PCB layer or interface surface depending on its size or location. Void inspection is important because it is related in yields with products. The most important process in the optical inspection of solder void is the segmentation process of solder and void. However, there are several segmentation algorithms for the vision inspection, it is impossible to inspect all of images ideally. When X-Ray images with poor contrast and high level of noise become difficult to perform image processing for vision inspection in terms of software programming. This paper suggests the solution to deal with the suggested problem by means of using Mask R-CNN instead of digital image processing algorithm. Mask R-CNN model can be trained with images pre-processed to increase contrast or alleviate noises. With this process, it provides more efficient system about complex object segmentation than conventional system.

• 한국지능시스템학회논문지
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• 제22권6호
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• pp.694-699
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• 2012

반도체 검사 공정에 적용하기 위한 대시야 백색광간섭계(WSI ; White Light Scanning Interferometer)를 사용한 반도체 검사 결과를 본 논문에서 제시한다. 각 서브스트레이트에 있는 동일한 여러 범프에 대한 3D 데이터 반복성 측정 실험 결과를 제시한다. 각 서브스트레이트의 모든 범프에 대한 3D 데이터 반복성 측정 실험 결과를 제시한다. 반도체 검사 공정에서 3D 데이터 검사를 고속으로 달성하기 위해 대시야 백색광간섭계를 사용한 반도체 검사는 매우 중요한 의미를 갖는다. 인라인 고속 3D 데이터 검사기 개발에 본 논문이 크게 기여할 수 있다.

• 반도체디스플레이기술학회지
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• 제10권2호
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• pp.97-102
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• 2011

Lots of 2D vision algorithms have been applied for inspection. However, these 2D vision algorithms have limitation in inspection applications which require 3D information data such as the height of semiconductor chips. Stereo vision is a well known method to measure the distance from the camera to the object to be measured. But it is difficult to apply for inspection directly because of its measurement error. In this paper, we propose two adjustment methods to reduce the error of the measured height data for stereo vision. The weight value based model is used to minimize the mean squared error. The average value based model is used with simple concept to reduce the measured error. The effect of these algorithms has been proved through the experiments which measure the height of semiconductor chips.

• 반도체디스플레이기술학회지
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• 제13권3호
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• pp.1-6
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• 2014

Visual defect inspection for electronics parts manufacturing processes is comprised of 2 steps - automatic visual inspection by machine and inspection by human inspectors. It is necessary that spatial points which were detected by the machine should be adequately clustered for subsequent human inspection. This research deals with the spatial clustering algorithm for the purpose of process productivity improvement. Distribution based clustering is newly developed and experimentally confirmed to show better clustering efficiency than existing algorithm - area based clustering.