• Journal of the Semiconductor & Display Technology
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• v.2 no.2
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• pp.21-24
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• 2003

Seam seal welding on the semiconductor package is a process for sealing the packages of semi-conductors, crystal parts, saw filters and oscillators with lid plate by seam welding. This paper presents the development process of automatic seam seal welding system. In this process, the process algorithm, high precision welding current control, design of welding head, high speed and high precision feeding mechanism and user interface process control program technologies are included.

• Journal of the Korean Society for Nondestructive Testing
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• v.21 no.6
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• pp.598-606
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• 2001

Recently, semiconductor packages trend to be thinner, which makes difficult to detect defects therein. A preconditioning test is generally performed to evaluate the reliability of semiconductor packages. The test procedure includes two scanning acoustic microscope (SAM) tests at the beginning and end of the entire test, in order to help detect physical defects such as delaminations and package cracks. In particular, of primary concern are package cracks and delaminations caused by moisture absorbed under ambient conditions. This paper discusses the failure mechanism associated with the moisture absorbed and encapsulated in semiconductors, and the use SAM to detect failures such as tracks and delaminations grown during the preconditioning test.

• Journal of Institute of Control, Robotics and Systems
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• v.19 no.11
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• pp.984-990
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• 2013

Pick and placement systems need high speeds and reliability for the position alignment process of semiconductor packages in picking up and placing them on placement trays. Image processing is usually adopted for position aligning where finding out the most suitable method is considered most important aspect of the process. This paper proposes a method for judging the performance of different image processing algorithms based on the PCI (Process Capability Index). The PCI is an index which represents the error distribution acquired from many experimental data. The bigger the index, the more reliable the results or the lower the deviation. Two compared and candidate methods are Hough Transform and PCA (Principal Component Analysis), both of which are very suitable for oblong or rectangular type packages such as BGA's. Comparing the two approaches through a CPI with enough experimental results leads to the conclusion that the PCA is much better than the Hough Transform in not only reliability, but also processing speed.

• Proceedings of the International Microelectronics And Packaging Society Conference
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• 2000.10a
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• pp.131-175
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• 2000

• Proceedings of the International Microelectronics And Packaging Society Conference
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• 2001.09a
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• pp.121-145
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• 2001

Chip Size Packages (CSP) are now widely used in high speed DRAM. The major driving farce of CSP development is its superior electrical performance than that of conventional package. However, the power dissipation of high speed DRAM like DDR or RAMBUS DRAM chip reaches up to near 2W. This fact makes the thermal management methods in DRAM package be more carefully considered. In this study, the thermal performances of 3 type CSPs named $\mu-BGA$^{TM}$$ $UltraCSP^{TM}$ and OmegaCSP$^{TM}$ were measured under the JEDEC specifications and their thermal characteristics were of a simulation model utilizing CFD and FEM code. The results show that there is a good agreement between the simulation and measurement within Max. 10% of $\circledM_{ja}$. And they show the wafer level CSPs have a superior thermal performance than that of $\mu-BGA.$ Especially the analysis results show that the thermal performance of wafer level CSPs are excellent fur modulo level in real operational mode without any heat sink.

• Proceedings of the KSME Conference
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• 2003.11a
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• pp.1442-1447
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• 2003

Computer is a very powerful machine which is widely using for data processing, DB construction, peripheral device control, image processing etc. Consequently, many researches and developments have progressed for high performance processing unit, and other devices. Especially, the core units such as semiconductor parts are rapidly growing so that high-integration, high-performance, microminiat turization is possible. The packaging in the semiconductor industry is very important technique to de determine the performance of the system that the semiconductor is used. In this paper, the inspection of the inner defects such as delamination, void, crack, etc. in the semiconductor packages is studied. ESPI which is a non-contact, non-destructive, and full-field inspection method is used for the inner defect inspection and its results are compared with that of C-Scan method.

• Journal of the Korea Convergence Society
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• v.8 no.11
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• pp.43-48
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• 2017

Semiconductors are leading the development of industrial technology, leading to miniaturization and weight reduction of electronic products as a leading technology, we are dragging the electronic industry market Especially, the semiconductor manufacturing process is composed of highly accurate and complicated processes, and effective production is required Recently, a vision system combining a computer and a camera is utilized for defect detection In addition, the demand for a system for measuring the shape of a fine pattern processed by a special process is rapidly increasing. In this paper, we propose a vision algorithm using mask image to detect scratch defect of semiconductor pockage. When applied to the manufacturing process of semiconductor packages via the proposed system, it is expected that production management can be facilitated, and efficiency of production will be enhanced by failure judgment of high-speed packages.

• Journal of the Microelectronics and Packaging Society
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• v.6 no.2
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• pp.31-36
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• 1999

An efficient method for thermal modeling of QFP is Proposed. Thermal measurement data are given to verify the method. In parallel with the experiment, an exact full 3-D model calculation is also provided. One fonds that there is an excellent agreement between validation data and the efficient model data.

• Proceedings of the Korean Society Of Semiconductor Equipment Technology
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• 2003.05a
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• pp.34-39
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• 2003

Seam seal welding on the semi-conductor package is a process for sealing the packages of semiconductors, crystal parts, saw filters, oscillators with lid plate by seam welding. This paper present the development process of automatic seam seal welding system. In this process, the process algorithm, high precision welding current control, design of welding head, high speed and high precision feeding mechanism, user interface process control program technologies are included.

• Journal of the Microelectronics and Packaging Society
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• v.27 no.1
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• pp.1-7
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• 2020

The backside metallization process is typically used to attach a chip to a lead frame for semiconductor packaging because it has excellent bond-line and good electrical and thermal conduction. In particular, the backside metal with the Ag/Sn/Ag sandwich structure has a low-temperature bonding process and high remelting temperature because the interfacial structure composed of intermetallic compounds with higher melting temperatures than pure metal layers after die attach process. Here, we introduce a die attach process with the Ag/Sn/Ag sandwich structure to apply commercial semiconductor packages. After the die attachment, we investigated the evolution of the interfacial structures and evaluated the shear strength of the Ag/Sn/Ag sandwich structure and compared to those of a commercial backside metal (Au-12Ge).