• 반도체디스플레이기술학회지
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• 제18권3호
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• pp.100-104
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• 2019

We have investigated the feasibility of fabricating fine stripes using needle coating for potential applications in solution-processed organic light-emitting diodes (OLEDs). To this end, we have employed an aqueous poly(3,4-ethylenedioxythiophene):poly(4-styrenesulfonate) (PEDOT:PSS) solution that has been widely used as a hole injection layer (HIL) of OLEDs and performed needle coatings by varying the process parameters such as the coating gap and coating speed. As expected, the stripe width is reduced with increasing coating speed. However, the central thickness of the stripe is rather increased as the coating speed increases, which is different from other coating processes such as slot-die and blade coatings. It is due to the fact that the meniscus formed between the needle tip and the substrate varies depending sensitively on the coating speed. It is also found that the stripe width and thickness are reduced with increasing coating gap. To demonstrate its applicability to OLEDs, we have fabricated a red OLED stripe and obtained light emission with the width of about 90㎛.

• 반도체디스플레이기술학회지
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• 제20권3호
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• pp.1-5
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• 2021

Sleep apnea refers to a condition in which a person does not breathe during sleep, and is a dangerous symptom that blocks oxygen supply in the body, causing various complications, and the elderly and infants can die if severe. In this paper, we present an algorithm that classifies sleep breathing by analyzing the intensity of breathing with images alone in preparation for the risk of sleep apnea. Only the chest of the person being measured is set to the Region of Interest (ROI) to determine the breathing strength by the differential image within the corresponding ROI area. The adult was selected as the target of the measurement and the breathing strength was measured accurately, and the difference in breathing intensity was also distinguished using depth information. Two videos of sleeping babies also show that even microscopic breathing motions smaller than adults can be detected, which is also expected to help prevent infant death syndrome (SIDS).

• Design & Manufacturing
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• 제14권4호
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• pp.58-64
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• 2020

Lately, the development of the semiconductor industry has led to the miniaturization of electronic devices. Therefore, semiconductor wafers of very thin thickness that can be used in Multi-Chip Packages are required. There is active research on the backgrinding process to reduce the thickness of the wafer. The backgrinding process polishes the backside of the wafer, reducing the thickness of the wafer to tens of ㎛. The equipment that performs the backgrinding process requires ultra-precision. Currently, there is no full auto backgrinding equipment in Korea. Therefore, in this study, ultra-precision backgrinding equipment was designed. In addition, finite element analysis was conducted to verify the equipment design validity. The deflection and structural stability of the backgrinding equipment were analyzed using finite element analysis.

• 반도체디스플레이기술학회지
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• 제22권3호
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• pp.155-160
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• 2023

The potential performance benefits of Silicon Carbide(SiC) MOSFETs in high power, high frequency power switching applications have been well established over the past 20 years. In the past few years, SiC MOSFET offerings have been announced by suppliers as die, discrete, module and system level products. In high-voltage SiC vertical devices, major design concerns is the edge termination and cell pitch design Field Limiting Rings(FLR) based structures are commonly used in the edge termination approaches. This study presents a comprehensive analysis of the impact of variation of FLR and JFET region on the performance of a 3.3 kV SiC MOSFET during. The improvement in MOSFET reverse bias by optimizing the field ring design and its influence on the nominal operating performance is evaluated. And, manufacturability of the optimization of the JFET region of the SiC MOSFET was also examined by investigating full-map electrical characteristics.

• 마이크로전자및패키징학회지
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• 제19권2호
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• pp.7-15
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• 2012

최근 모바일 기기에 적용되는 반도체 패키지는 초소형, 초박형 및 다기능을 요구하고 있기 때문에 다양한 실리콘 칩들이 다층으로 수직 적층된 패키지의 개발이 필요하다. 패키지 및 실리콘 칩의 두께가 계속 얇아지면서 휨 현상, 크랙 및 여러 다른 형태의 파괴가 발생될 가능성이 많다. 이러한 문제는 패키지 재료들의 열팽창계수의 차 및 패키지의 구조적인 설계로 인하여 발생된다. 본 연구에서는 4층으로 적층된 FBGA 패키지의 휨 현상 및 응력을 수치해석을 통하여 상온과 리플로우 온도 조건에서 각각 분석하였다. 상온에서 가장 적은 휨을 보여준 경우가 리플로우 공정 조건에서는 오히려 가장 큰 휨을 보여 주고 있다. 본 연구의 물성 조건에서 패키지의 휨에 가장 큰 영향을 미치는 인자는 EMC의 열팽창계수, EMC의 탄성계수, 다이의 두께, PCB의 열팽창계수 순이었다. 휨을 최소화하기 위하여 패키지 재료들의 물성들을 RMS 기법으로 최적화한 결과 패키지의 휨을 약 $28{\mu}m$ 감소시킬 수 있었다. 다이의 두께가 얇아지게 되면 다이의 최대 응력은 증가한다. 특히 최상부에 위치한 다이의 끝 부분에서 응력이 급격히 증가하기 시작한다. 이러한 응력의 급격한 변화 및 응력 집중은 실리콘 다이의 파괴를 유발시킬 가능성이 많다. 따라서 다이의 두께가 얇아질수록 적절한 재료의 선택 및 구조 설계가 중요함을 알 수 있다.

• 대한전자공학회논문지SD
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• 제49권3호
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• pp.1-7
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• 2012

본 논문에서는 모바일 정보기기의 배터리 전력 관리를 제어하는 IBS(Intelligent Battery sensor), BMS(Battery Management System) 등의 PMIC(Power Management IC) 기술에 적합한 9b 2MHz 사이클릭 폴딩 ADC(Analog-to-Digital Converter)를 제안한다. 제안하는 ADC는 응용기술에 적합한 고해상도를 만족시키는 동시에 폴딩 신호처리를 사용함으로써 고속 동작이 가능하다. 또한 폴딩 블록의 하나의 단만을 반복적으로 순환하는 구조로 설계되기 때문에 전체 크기가 줄어들 뿐 아니라 전력소모도 최소화 할 수 있다. 제안하는 시제품 ADC는 0.35um 2P4M CMOS 공정으로 제작되었으며, 측정된 INL 및 DNL은 각각 ${\pm}1.5/{\pm}1.0\;LSB$ 이내로 들어온 것을 확인하였다. 또한 2MS/s 동작 속도에서 SNDR 및 SFDR 이 각각 최대 48dB, 60dB이고, 전력 소모는 3.3V 전원 전압에서 110mW 이며 제작된 ADC의 칩 면적은 $10mm^2$이다.

• ETRI Journal
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• 제30권6호
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• pp.783-789
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• 2008

A bio-inspired vision chip for edge detection was fabricated using 0.35 ${\mu}m$ double-poly four-metal complementary metal-oxide-semiconductor technology. It mimics the edge detection mechanism of a biological retina. This type of vision chip offer several advantages including compact size, high speed, and dense system integration. Low resolution and relatively high power consumption are common limitations of these chips because of their complex circuit structure. We have tried to overcome these problems by rearranging and simplifying their circuits. A vision chip of $160{\times}120$ pixels has been fabricated in $5{\times}5\;mm^2$ silicon die. It shows less than 10 mW of power consumption.

• 산업경영시스템학회지
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• 제32권3호
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• pp.99-109
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• 2009

Negative binomial yield model for semiconductor manufacturing consists of two parameters which are the average number of defects per die and the clustering parameter. Estimating the clustering parameter is quite complex because the parameter has not clear closed form. In this paper, a Bayesian approach using Markov Chain Monte Carlo is proposed to estimate the clustering parameter. To find an appropriate estimation method for the clustering parameter, two typical estimators, the method of moments estimator and the maximum likelihood estimator, and the proposed Bayesian estimator are compared with respect to the mean absolute deviation between the real yield and the estimated yield. Experimental results show that both the proposed Bayesian estimator and the maximum likelihood estimator have excellent performance and the choice of method depends on the purpose of use.

• 한국정밀공학회:학술대회논문집
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• 한국정밀공학회 1997년도 추계학술대회 논문집
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• pp.865-869
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• 1997

In recent years, there has been increasing demand of ultra-fine grain graded cemented tungsten carbide material with high hardness and toughness which is used as high speed cutting tool for development in semiconductor, electronics and die/mold industry, which bring into limelight high-precision, high-efficient machining of sculptured surfaces. This paper deals with the performance of variation in the ultra-fine grain graded cemented tungsten carbide material such as grain size, hardness and density varied according to the volume of added elements, Co or TaC, and he changing of mixing, sintering process. Also, the performance of developing material with uniformed grain size of 0.5${\mu}{\textrm}{m}$ is compared with other domestics' & foreign companies' with analyzing and cutting performance testing.

• JSTS:Journal of Semiconductor Technology and Science
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• 제6권3호
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• pp.136-145
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• 2006

Two major processing technologies of GaAs HBT and pHEMT have been released in production at Win Semiconductors corp. to address the strong demands of power amplifiers and switches for both handset and WLAN communications markets. Excellent performance with low processing cost and die shrinkage features is reported from the manufactured MMICs. With the stringent tighter manufacturing quality control WIN has successfully become one of the major pure open foundry house to serve the communication industries. The advancing of both technologies to include E/D-pHEMTs and BiHEMTs likes for multifunctional integration of PA, LNA, switch and logics is also highlighted.