• Title/Summary/Keyword: Semiconductor

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A Study on the Detection of Surface Defect Using Image Modeling (영상모델링을 이용한 표면결함검출에 관한 연구)

  • 목종수;사승윤;김광래;유봉환
    • Proceedings of the Korean Society of Precision Engineering Conference
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    • 1996.11a
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    • pp.444-449
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    • 1996
  • The semiconductor, which is precision product, requires many inspection processes. The surface conditions of the semiconductor chip affect on the functions of the semiconductors. The defects of the chip surface are cracks or voids. As general inspection method requires many inspection procedure, the inspection system which searches immediately and precisely the defects of the semiconductor chip surface is required. We suggest the detection algorithm for inspecting the surface defects of the semiconductor surface. The proposed algorithm first regards the semiconductor surface as random texture and point spread function, and secondly presents the character of texture by linear estimation theorem. This paper assumes that the gray level of each pixel of an image is estimated from a weighted sum of gray levels of its neighbor pixels by linear estimation theorem. The weight coefficients are determined so that the mean square error is minimized. The obtained estimation window(two-dimensional estimation window) characterizes the surface texture of semiconductor and is used to discriminate the defects of semiconductor surface.

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16-ns 256K CMOS SRAM (16-ns 256k CMOS SRAM)

  • Kim, B.Y.;Jung, T.S.;Park, H.C.;Hwang, S.K.;Park, Y.B.;Kim, C.R.;Choi, K.H.
    • Proceedings of the KIEE Conference
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    • 1988.07a
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    • pp.311-314
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    • 1988
  • This paper describes 256k (256K ${\times}$1) CMOS SRAM utilizing 1.2um double-polysilicon and double-metal CMOS process. A typical access time of 16ns with a 30-pF load has been achieved through the use of a block architecture, a new decoder, an unique bit-line scheme and an optimized process. Operating current is 55mA at 40MHz and 15mA at 10MHz. A high-resistive polysilicon load has been used to achieve a standby current of 3uA.

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Semiconductor Process Inspection Using Mask R-CNN (Mask R-CNN을 활용한 반도체 공정 검사)

  • Han, Jung Hee;Hong, Sung Soo
    • Journal of the Semiconductor & Display Technology
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    • v.19 no.3
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    • pp.12-18
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    • 2020
  • In semiconductor manufacturing, defect detection is critical to maintain high yield. Currently, computer vision systems used in semiconductor photo lithography still have adopt to digital image processing algorithm, which often occur inspection faults due to sensitivity to external environment. Thus, we intend to handle this problem by means of using Mask R-CNN instead of digital image processing algorithm. Additionally, Mask R-CNN can be trained with image dataset pre-processed by means of the specific designed digital image filter to extract the enhanced feature map of Convolutional Neural Network (CNN). Our approach converged advantage of digital image processing and instance segmentation with deep learning yields more efficient semiconductor photo lithography inspection system than conventional system.

A study for safety-accident analysis pattern extract model in semiconductor industry (반도체산업에서의 안전사고 분석 패턴 추출 모델 연구)

  • Yoon Yong-Gu;Park Peom
    • Journal of the Korea Safety Management & Science
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    • v.8 no.2
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    • pp.13-23
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    • 2006
  • The present study has investigated the patterns and the causes of safety -accidents on the accident-data in semiconductor Industries through near miss report the cases in the advanced companies. The ratio of incomplete actions to incomplete state was 4 to 6 as the cases of accidents in semiconductor industries in the respect of Human-ware, Hard- ware, Environment-ware and System-ware. The ratio of Human to machine in the attributes of semiconductor accident was 4 to 1. The study also investigated correlation among the system related to production, accident, losses and time. In semiconductor industry, we found that pattern of safety-accident analysis is organized potential, interaction, complexity, medium. Therefore, this study find out that semiconductor model consists of organization, individual, task, machine, environment and system.

Investigation of Frequency Dependent Sensitivity of Noise Figure on Device Parameters in 65 nm CMOS

  • Koo, Min-Suk;Jung, Hak-Chul;Jhon, Hee-Sauk;Park, Byung-Gook;Lee, Jong-Duk;Shin, Hyung-Cheol
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.9 no.1
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    • pp.61-66
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    • 2009
  • We have investigated the noise sensitivity of low noise amplifier (LNA) at different frequency. This noise sensitivity analysis provides insights about noise parameters and it is very beneficial for making appropriate design trade-offs. From this work, the circuit designer can choose the adequate noise parameters tolerances.

Extraction of Ballistic Parameters in 65 nm MOSFETs

  • Kim, Jun-Soo;Lee, Jae-Hong;Kwon, Yong-Min;Park, Byung-Gook;Lee, Jong-Duk;Shin, Hyung-Cheol
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.9 no.1
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    • pp.55-60
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    • 2009
  • The channel backscattering coefficient and injection velocity have been extracted experimentally in 65nm MOSFETs. Thanks to an experimental extraction methodology taking into account multi-subband population, we demonstrate that the short channel ballistic efficiency is slightly greater than long channel ballistic efficiency.

Fabrication of soluble organic thin film transistor with ammonia ($NH_3$) plasma treatment

  • Kim, Dong-Woo;Kim, Doo-Hyun;Kim, Keon-Soo;Kim, Hyoung-Jin;Choi, Hong;Lee, Dong-Hyeok;Hong, Mun-Pyo
    • 한국정보디스플레이학회:학술대회논문집
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    • 2009.10a
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    • pp.566-567
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    • 2009
  • We have examined the silicon nitride ($SiN_x$) as gate insulator with the ammonia ($NH_3$) plamsa treatment for the soluble derivatives of polythiophene as p-type channel materials of organic thin film transistors (OTFTs). Fabrications of the jetting-processed OTFTs with $SiN_x$ as gate insulator by $NH_3$ plasma treatment can be similar to performance of OTFTs with silicon dioxide ($SiO_2$) insulator.

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Balancing System for Electric Double Layer Capacitor (전기이중층 캐패시터용 밸런싱 시스템)

  • Nam, Jong-ha;Jo, H.M;Park, J.G;Park, S.U;Kang, D.H;Kim, Y.S;Hwang, H.S
    • Proceedings of the KIPE Conference
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    • 2013.07a
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    • pp.59-60
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    • 2013
  • 슈퍼캐패시터(Super Capacitor) 또는 울트라 캐패시터(Ultra Capacitor) 등으로 불리우는 전기 이중층 캐패시터(EDLC, Electric Double Layer Capacitor)는 기존 콘덴서보다 월등한 용량 특성을 가지며, 전극과 전해질의 화학반응을 이용하던 이차전지들과 달리 주로 계면반응을 사용한 축전원리를 이용하여 높은 출력밀도와 충방전 효율, 무제한에 가까운 사이클 특성을 가지고 있다. 또한 전류변화에 안정적이어서 기존의 이차전지와는 달리 보호회로를 생략할 수 있기 때문에 단순한 회로 구성이 가능하고 전극활물질로서 탄소재를 사용하여 환경 친화적인 특성을 가진 차세대 에너지저장장치라고 할 수 있다. 특히 50만 사이클이라는 우수한 수명특성으로 인해 기존의 이차전지가 사용되기 어려운 다양한 분야에 적용이 늘어가고 있는 추세에 있다.

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