• Proceedings of the Korean Vacuum Society Conference
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• 1997.02a
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• pp.38-38
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• 1997

• Communications of the Korean Mathematical Society
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• v.27 no.2
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• pp.341-345
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• 2012

In this paper, we introduce the notions of minimal semicon-tinuity, strongly $m$-semiclosed graph, $m$-semiclosed graph, $m$-semi-$T_2$, $m$-semicompact and investigate some properties for such notions.

• Journal of the Korea Safety Management & Science
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• v.15 no.4
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• pp.289-294
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• 2013

Due to sudden transition to intellectual society corresponding with fast technology progress, companies and nations need to focus on development and guarantee of intellectual property. The possession of intellectual property has been the important factor of competition power. In this paper we developed the efficient patent search process with big data analysis tool R. This patent search process consists of 5 steps. We result that at first this process obtain the core patent search key words and search the target patents through search formula using the combination of above patent search key words.

• 한국신재생에너지학회:학술대회논문집
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• 2011.05a
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• pp.115.1-115.1
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• 2011

최근 기본적인 pin 구조의 박막 cell 에서 i layer를 최적화 시키는 방안으로 double layer 구조가 많이 연구되고 있다. 본 연구에서는 ASA(Advanced Semicon ductor Analysis) simulation을 이용하여 i-double layer 최적화에 대한 연구를 진행해 보았다. 두께 150/150nm의 i double layer의 band gap 가변을 한 simulation 결과를 보았을 때, p쪽의 band gap이 상승하면서 intrinsic layer 내의 field가 증가하여 recombination center가 감소하였으나 FF의 감소가 있었다. n쪽의 band gap을 상승 시켰을때 n/i 쪽 field 증가로 Voc가 상승되어 초기 효율이 증가하였으나 intrinsic layer내의 field가 감소하여 recombination center가 오히려 증가하였다. 결과적으로 electric field와 효율을 동시에 고려했을 때 두께 300nm, 1.75의 band gap을 가지는 single layer 보다 150/150nm두께에 1.8/1.7 또는 1.8/1.75의 bandgap을 가지는 double layer를 사용하였을 때 보다 높은 효율을 얻을 수 있었다.

• Journal of the Korean Ceramic Society
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• v.22 no.4
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• pp.9-14
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• 1985

The quantum efficiency vs. wavelength curves with different reducing treatments for the 99.99% and 98.5% $TiO_2$ ceramic electrodes have been analyzed according to the Schottky barrier model of the semiconductor-elect-rolyte interface, The model allows the main physical parameters governing the photoelectrochemical properties of the semicon-ductor to be determined. According to these data the impurity ions as three valence state ($Fe^{3+})$ in the $TiO_2$ raw materials have great influence on the photoresponse and the $TiO_2$ ceramic electrodes show much lower quantum efficiency than the $TiO_2$ single crystal due to existence of the recombination centers.

• Proceedings of the IEEK Conference
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• 1999.06a
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• pp.970-973
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• 1999

When the size of the device is decreased, the hot carrier degradation presents a severe problem for long-term device reliability. In this paper we fabricated & tested the 0.26${\mu}{\textrm}{m}$ NMOSFET with wet gate oxide and nitride oxide gate to compare that the characteristics of hot carrier effect, charge to breakdown, transistor Id_Vg curve and charge trapping using the Hp4145 device tester As a result we find that the characteristics of nitride oxide gate device better than wet gate oxide device, especially a hot carrier lifetime(nitride oxide gate device satisfied 30years, but the lifetime of wet gate oxide was only 0.1year), variation of Vg, charge to breakdown and charge trapping etc.

• Proceedings of the Korean Information Science Society Conference
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• 1999.10c
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• pp.167-169
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• 1999

산업응용 시스템에 있어서의 생산성이란 시스템의 성능 및 효율성에 관한 척도가 된다. 따라서, 시스템의 개발 전과정에서 이를 향상시키려는 많은 노력이 이루어진다. 특히 반도체의 제조공정에서는 이를 위한 노력이 민감하게 발전되어 왔다. 이들 중 IC Test Handler의 Socket관리는 제품(Device)의 생산량과 함께 시스템의 효율성에 직접적인 영향을 주는 부분으로 많은 연구 및 개발이 이루어지고 있다. 본 논문에서는 이러한 생산성 및 효율성을 높이기 위한 자동 Socket 관리 시스템을 개발하여 사용자(Operator)에게 보다 향상된 시스템 환경을 제공하고자 한다. 이를 위해 PC 환경의 GUI 시스템을 도입하였으며, 실제적인 제어부분은 Real Time 운영체제를 탑재한 VME 시스템이 담당하였다. 또한, 신뢰성을 위하여 날짜별 데이터를 하드디스크에 저장하여 Socket 데이터를 사용자가 확인할 수 있도록 하였다.

• Journal of Powder Materials
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• v.13 no.1 s.54
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• pp.52-56
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• 2006

The aim of this work was to establish an optimal condition for determination of apparent density and flow rate for warm compacting powder. For this purpose it was evaluated uncertainty on them according to ISO Guide to the Expression of Uncertainty in Measurement. This evaluation example would be useful even in powder fluidity measurement at room temperature.

• ETRI Journal
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• v.35 no.4
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• pp.603-609
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• 2013

In this paper, we present a 600-V reverse conducting insulated gate bipolar transistor (RC-IGBT) for soft and hard switching applications, such as general purpose inverters. The newly developed RC-IGBT uses the deep reactive-ion etching trench technology without the thin wafer process technology. Therefore, a freewheeling diode (FWD) is monolithically integrated in an IGBT chip. The proposed RC-IGBT operates as an IGBT in forward conducting mode and as an FWD in reverse conducting mode. Also, to avoid the destructive failure of the gate oxide under the surge current and abnormal conditions, a protective Zener diode is successfully integrated in the gate electrode without compromising the operation performance of the IGBT.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.34C no.6
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• pp.58-70
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• 1997

In this paper, an 8bit CMOS low power, high-speed current-mode folding and interpolation A/D converter is designed with te LG semicon $0.8\mu\textrm{m}$ N-well single-poly/double-metal CMOS process to be integrated into a portable image signal processing system such as a digital camcoder. For good linearity and low power consumption, folding amplifiers and for high speed performance of the A/D converter, analog circuitries including folding block, current-mode interpolation circuit and current comparator are designed as a differential-mode. The fabricated 8 bit A/D converter occupies the active chip area of TEX>$2.2mm \times 1.6mm$ and shows DNL of $\pm0.2LSB$, INL of <$\pm0.5LSB$, conversion rate of 40M samples/s, and the measured maximum power dissipation of 33.6mW at single +5V supply voltage.