• JSTS:Journal of Semiconductor Technology and Science
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• v.3 no.2
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• pp.69-75
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• 2003

Cell transistor and data retention time characteristics were studied in 90 nm design rule 512M-bit DRAM, for the first time. And, the characteristics of cell transistor are investigated for different STI gap-fill materials. HDP oxide with high compressive stress increases the threshold voltage of cell transistor, whereas the P-SOG oxide with small stress decreases the threshold voltage of cell transistor. Stress between silicon and gap-fill oxide material is found to be the major cause of the shift of the cell transistor threshold voltage. If high stress material is used for STI gap fill, channel-doping concentration can be reduced, so that cell junction leakage current is decreased and data retention time is increased.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.13 no.9
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• pp.729-734
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• 2000

Recently, Very Large Scale Integrated (VLSI) circuit & deep-submicron bulk Complementary Metal Oxide Semiconductor(CMOS) devices require gate electrode materials such as metal-silicide, Titanium-silicide for gate oxides. Many previous authors have researched the improvement sub-micron gate oxide quality. However, few have reported on the electrical quality and reliability on the ultra thin gate oxide. In this paper, at first, I recommand a novel shallow trench isolation structure to suppress the corner metal-oxide semiconductor field-effect transistor(MOSFET) inherent to shallow trench isolation for sub 0.1${\mu}{\textrm}{m}$ gate oxide. Different from using normal LOCOS technology deep-submicron CMOS devices using novel Shallow Trench Isolation(STI) technology have a unique"inverse narrow-channel effects"-when the channel width of the devices is scaled down, their threshold voltage is shrunk instead of increased as for the contribution of the channel edge current to the total channel current as the channel width is reduced. Secondly, Titanium silicide process clarified that fluorine contamination caused by the gate sidewall etching inhibits the silicidation reaction and accelerates agglomeration. To overcome these problems, a novel Two-step Deposited silicide(TDS) process has been developed. The key point of this process is the deposition and subsequent removal of titanium before silicidation. Based on the research, It is found that novel STI structure by the SEM, in addition to thermally stable silicide process was achieved. We also obtained the decrease threshold voltage value of the channel edge. resulting in the better improvement of the narrow channel effect. low sheet resistance and stress, and high threshold voltage. Besides, sheet resistance and stress value, rms(root mean square) by AFM were observed. On the electrical characteristics, low leakage current and trap density at the Si/SiO$_2$were confirmed by the high threshold voltage sub 0.1${\mu}{\textrm}{m}$ gate oxide.

• MALSORI
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• no.50
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• pp.99-110
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• 2004

The normal transmission characteristics of sound are hardly obtained due to the various noises and structural factors in a running car environment. It is due to the channel distortion of the original source sound recorded by microphones, and it seriously degrades the performance of the speech recognition in real driving environments. In this paper we analyze the degree of intelligibility under the various sound distortion environments by channels according to driving speed with respect to speech transmission index(STI) and compare the STI with rates of speech recognition. We examine the correlation between measures of intelligibility depending on sound pick-up patterns and performance in speech recognition. Thereby we consider the optimal location of a microphone in single channel environment. In experimentation we find that high correlation is obtained between STI and rates of speech recognition.

• Proceedings of the Materials Research Society of Korea Conference
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• 2003.11a
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• pp.65-65
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• 2003

Chemical mechanical polishing (CMP) is one of the most important processes in recent ULSI (Ultra Large Scale Integrated Circuit) manufacturing technology. Recently, ceria slurries with surfactant have recently been used in STI-CMP,[1] became they have high oxide-to-nitride removal selectivity and widen the processing margin The role of the abrasives, however, on the effect of planarization on STI-CMP is not yet clear. In this study, we investigated how the crystal characteristic affects the planarization efficiency of wafer surface with controlling crystallite size and poly crystalline abrasive size independently.

• Proceedings of the Korean Society for Noise and Vibration Engineering Conference
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• 2007.05a
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• pp.649-654
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• 2007

Eavesdropping prevention performance is evaluated on a commercial window shaker, which is used to prevent a glass window from eavesdropping. Speech transmission index (STI) is introduced in order to estimate quantitatively the speech intelligibility of the sound detected on the glass window. Objective test by IEC standard using modulation transfer function (MTF) is performed to determine STI. Using Maximum Length Sequency (MLS) signal as a sound source, MTF is measured by accelerometers and laser doppler vibrometer. STI under different level of disturbing wave are compared to confirm the disturbing effect on the speech intelligibility.

• STI Policy Review
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• v.6 no.1
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• pp.70-84
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• 2015

The paper discusses technology platforms as an instrument of science, technology and innovation policy in light of their use in industrial R&D. The authors assert that the technology platforms approach as a policy concept refects special organizational and institutional features learned from industrial technology platforms. The characteristics of industrial technology platforms are reviewed, and their impact on the organization of research, development and innovation activities in companies is explored. Second, the industrial technology platform is examined in the context of European Technology Platforms and the recent initiative for technology platforms in Russia. Finally, the technology platform concept implications for the STI policy context are discussed.

• STI Policy Review
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• v.7 no.1
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• pp.66-86
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• 2016

This paper discusses government-backed venture capital as a science, technology and innovation (STI) policy instrument from the Chinese perspective. China aspires to overhaul its growth model by vigorously promoting technological innovation and entrepreneurship. Like many other countries, however, funding gaps constrain new technology ventures in the early stages of venture development. To plug this gap, China attempts to use government-backed venture capital as a policy instrument. Super-size central government-backed VCs were set up and dozens of similar schemes are in operation at local levels. This paper provides a case study of such government-backed venture capital schemes in China. It documents the background conditions explaining the country's need for public venture capital, describes the distinct features of program design in such schemes, and assesses the impact of government-backed venture capital.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.40 no.9
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• pp.638-643
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• 2003

Channel width dependence of hot-carrier effect in nMOSFET with shallow trench isolation is analyzed. $I_{sub}$- $V_{G}$ and $\Delta$ $I_{ㅇ}$ measurement data show that MOSFETs with narrow channel-width are more susceptible to the hot-carrier degradation than MOSFETs with wide channel-width. By analysing $I_{sub}$/ $I_{D}$, linear $I_{D}$- $V_{G}$ characteristics, thicker oxide-thickness at the STI edge is identified as the reason for the channel-width dependent hot-carrier degradation. Using the charge-pumping method, $N_{it}$ generation due to the drain avalanche hot-carrier (DAHC) and channel hot-electron (CHE) stress are compared. are compared.

• JSTS:Journal of Semiconductor Technology and Science
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• v.5 no.2
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• pp.102-106
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• 2005

A low dark current CMOS image sensor (CIS) pixel without any process modification is developed. Dark current is mainly generated at the interface region of shallow trench isolation (STI) structure. Proposed pixel reduces the dark current effectively by separating the STI region from the photodiode junction using simple layout modification. Test sensor array that has both proposed and conventional pixels is fabricated using 0.18 m CMOS process and the characteristics of the sensor are measured. The result shows that the dark current of the proposed pixel is 0.93fA/pixel that is two times lower than the conventional design.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.08a
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• pp.183-183
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• 2010

최근 고밀도 플라즈마(High Density Plasma, HDP)를 이용하여 STI (shallow trench Isolation) 공정에 사용하기 위한 높은 종횡비를 가지는 갭을 공극 없이 절연물질로 채우는 HDP CVD 법이 개발되어 사용되고 있으며, HDP 공정에서는 그 증착 과정 중에 스퍼터링(Sputtering)에 의한 식각이 동시에 발생하기 때문에 높은 종횡비를 가지는 갭을 공극 없이 채우는 것이 가능하게 되었다. 이러한 특성을 이용하여 HDP CVD 공정은 주로 STI 와 알루미늄 배선간의 갭을 실리콘 산화막 ($SiO_2$)의 절연막으로 채우는 데 주로 사용되고 있다. 이 논문에서는 새로 개발된 HDP CVD 법을 적용하여 300 mm Si 웨이퍼에 $SiO_2$ 절연막을 증착하여 웨이퍼의 중심과 가장자리의 deposition uniformity를 nano-indenter system을 이용하여 연구하였으며, 그 결과 300 mm 웨이퍼에서 균일한 탄성계수 값이 측정되었다. 또한 HDP CVD로 제작된 SiO2 박막의 탄성계수 값이 99 - 107 GPa로 측정되어 기존 PECVD-$SiO_2$ 박막보다 약 10 - 20% 향상된 것을 확인하였다.