• 한국정보디스플레이학회:학술대회논문집
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• 2000.01a
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• pp.151-152
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• 2000

For excimer laser crystallization (ELC), energy density, number of pulses, beam uniformity, and condition of initial amorphous Si (a-Si) films are significant factors contributing the final microstructure and the performance of low-temperature polycrystalline Si TFTs. The process and equipment have been achieved a significant improvement, but still, environmental factors associated with initial amorphous Si (a-Si) films and process conditions need to be optimized.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.28 no.8
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• pp.481-485
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• 2015

We investigated the effects of annealing on the electrical and thermal properties of ZTO/4H-SiC heterojunction diodes. A ZTO thin film layer was grown on p-type 4H-SiC substrate by using solution process. The ZTO/SiC heterojunction structures annealed at $500^{\circ}C$ show that $I_{on}/I_{off}$ increases from ${\sim}5.13{\times}10^7$ to ${\sim}1.11{\times}10^9$ owing to the increased electron concentration of ZTO layer as confirmed by capacitance-voltage characteristics. In addition, the electrical characterization of ZTO/SiC heterojunction has been carried out in the temperature range of 300~500 K. When the measurement temperature increased from 300 K to 500 K, the reverse current variation of annealed device is higher than as-grown device, which is related to barrier height in the ZTO/SiC interface. It is shown that annealing process is possible to control the electrical characteristics of ZTO/SiC heterojunction diode.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.32A no.2
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• pp.66-72
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• 1995

Using the Si/SiGe layer grown by solid source molecular beam epitaxy(SSMBE) on the LOCOS-patterned wafers, an emitter-base self-aligned hterojunction biplar transistor(HBT) with the polysilicon-emitter and the silicon germanium(SiGe) base has been fabricated. Trech isolation process, planarization process using a chemical-mechanical poliching, and the selectively implanted collector(SIC) process were performed. A titanium disilicide (TiSi$_{2}$), as a base electrode, was used to reduce an extrinsic base resistance. To prevent the strain relaxation of the SiGe epitaxial layer, low temperature (820${^\circ}C$) annealing process was applied for the emitter-base junction formation and the dopant activation in the arsenic-implanted polysilicon. For the self-aligned Si/SiGe HBT of 0.9${\times}3.8{\mu}m^{2}$ emitter size, a cut-off requency (f$_{T}$) of 17GHz, a maximum oscillation frequency (f$_{max}$) of 10GHz, a current gian (h$_{FE}$) of 140, and an emitter-collector breakdown voltage (BV$_{CEO}$) of 3.2V have been typically achieved.

• Korean Journal of Materials Research
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• v.14 no.5
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• pp.315-321
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• 2004

The void evolution in direct bonding process of $Si/Si_3$$N_4$ ∥ $SiO_2$/Si silicon wafer pairs has been investigated with an infrared camera. The voids that formed in the premating process grew in the conventional furnace annealing process at a temperature of $600^{\circ}C$. The voids are never shrunken even with the additional annealing process at the higher temperatures. We observed that the voids became smaller and disappeared with sequential scanning by our newly proposed fast linear annealing(FLA). FLA irradiates the focused line-shape halogen light on the surface while wafer moves from one edge to the other. We also propose the void shrinking mechanism in FLA with the finite differential method (FDM). Our results imply that we may eliminate the voids and enhance the yield for the direct bonding of wafer pairs by employing FLA.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.24 no.9
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• pp.766-772
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• 2011

Amorphous Si (a-Si) thin films of $p^+/p^-/n^+$ were deposited on $Si_3N_4$/glass substrate by using a plasma enhanced chemical vapor deposition (PECVD) method. These films were annealed at various temperatures and for various times by using a rapid thermal process (RTP) equipment. This step was added before the main thermal treatment to make the nuclei in the a-Si thin film for reducing the process time of the crystallization. The main heat treatment for the crystallization was performed at the same condition of $600^{\circ}C$/18 h in conventional furnace. The open-circuit voltages ($V_{oc}$) were remained about 450 mV up to the nucleation condition of 16min in the nucleation RTP temperature of $680^{\circ}C$. It meat that the process time for the crystallization step could be reduced by adding the nucleation step without decreasing the electrical property of the thin film Si for the solar cell application.

• Journal of the Korean Ceramic Society
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• v.43 no.8 s.291
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• pp.509-514
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• 2006

In this study, chopped Hi-Nicalon SiC fiber Reinforced Porous Reaction Bonded SiC (RBSC) composites and it fabrication process were developed by using Si melt infiltration process. The porosity and average pore size in fabricated chopped SiC fiber reinforced porous RBSC composites were in the range of $30{\sim}40%$ and $40-90{\mu}m$, which mainly determined by the SiC powder size used as starting material and amount of residual Si in porous composites. The maximum flexural strength of chopped SiC fiber reinforced porous RBSC composite was as high as 80 MPa. The delayed fracture behavior was observed in chopped SiC fiber reinforced porous RBSC composites upon 3-point bending strength test.

• Proceedings of the Korean Society For Composite Materials Conference
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• 2000.04a
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• pp.139-142
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• 2000

The SiCp/AC8A composites were fabricated by the pressureless metal infiltration process successfully. The effect of additional Mg, which were mixed with SiC particles to promote interfacial wetting between the reinforcement and matrix alloy, and particle size on the mechanical properties was investigated. By increasing the additional Mg content the hardness of SiCp/AC8A composites was increased due to the hard reaction products, but the bending strength was decreased by the excess reaction of Mg and high porosity level when the additional Mg content is over 7%. The Hardness and bending strength was increased by decreasing the size of SiC particle.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.08a
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• pp.132-132
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• 2010

In the nano-scale Si processing, patterning processes based on multilevel resist structures becoming more critical due to continuously decreasing resist thickness and feature size. In particular, highly selective etching of the first dielectric layer with resist patterns are great importance. In this work, process window for the infinitely high etch selectivity of silicon oxynitride (SiON) layers and silicon nitride (Si3N4) with EUV resist was investigated during etching of SiON/EUV resist and Si3N4/EUV resist in a CH2F2/N2/Ar dual-frequency superimposed capacitive coupled plasma (DFS-CCP) by varying the process parameters, such as the CH2F2 and N2 flow ratio and low-frequency source power (PLF). It was found that the CH2F2/N2 flow ratio was found to play a critical role in determining the process window for ultra high etch selectivity, due to the differences in change of the degree of polymerization on SiON, Si3N4, and EUV resist. Control of N2 flow ratio gave the possibility of obtaining the ultra high etch selectivity by keeping the steady-state hydrofluorocarbon layer thickness thin on the SiON and Si3N4 surface due to effective formation of HCN etch by-products and, in turn, in continuous SiON and Si3N4 etching, while the hydrofluorocarbon layer is deposited on the EUV resist surface.

• Journal of Powder Materials
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• v.7 no.1
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• pp.35-41
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• 2000

Al2O3$.$SiC particle was prepared was prepared by the self-propagting high temperature sYthesis(SHS) process from a mixture of SiO2, Al and C powders, The fabricated Al2O3$.$SiC particle was applied to 2024Al/(Al2O3$.$SiC)pcomposite as a reinforcement. Aluminum matix composites were fabricares by the powder extrusion method using the synthesized Al2O3$.$SiC particle and commercial 2024Al powder. Theoptimum preparation conditions for Al2O3$.$SiC partticle by SHS process were described. The influence of the Al2O3$.$SiC voiume fraction on the mechanical was composite was also discussed. Despite adiabatic temperature was about 2367K, SHs reaction was completed not by itself, but by using pre-heating. Mean particle size of final particle synthesized was 0.73 ${\mu}$m and most of the particle was smaller than 2${\mu}$m. Elastic modulus and tensile strength of the composite increased with increase the volume fraction of reinforcement but, tensile strength depreciated at 30 vol% of reinforcement.

• Proceedings of the Korean Institute of Surface Engineering Conference
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• 2018.06a
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• pp.97.2-97.2
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• 2018

This study formed a hard TiAlSiWN coating layer using Ti, Al, Si and W raw powders that were mechanically alloyed and refined. The TiAlSi and TiAlSiW coating targets were fabricated using a single PCAS process in a short time with the optimal sintering conditions. The coating targets were deposited on the WC substrate by forming coating layers using TiAlSiN and TiAlSiWN nitride nano-composite structures with an AIP process. The properties of the nitride nano-composite coating layers were compared according to the addition of W. The microstructure of the nitride nano-composite coating layer was analyzed, focusing on the distribution of the crystalline phases, amorphous phases ($Si_3N_4$), and growth orientation of the columnar crystal depending on the addition of W. The mechanical properties of the coating layers were exhibited a hardness of approximately $3,000kg/mm^2$ and adhesion of about 117.77N in the TiAlSiN. In particular, the TiAlSiWN showed excellent properties with a hardness of more than $4,300kg/mm^2$ and an adhesion of about 181.47N.