• KIEAE Journal
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• v.4 no.3
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• pp.65-70
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• 2004

The purpose of this study is to analysis the thermal performance of the clayed hollow block wall. Its thermal performance was evaluated comparison with the cement block wall, it was generally used in building envelope. To that end, we conducted a insulation performance experiment and heating and cooling load simulation for a respective wall. In addition, we calculated a construction cost for each other's wall. The results of this study can be summarized as follows. (1) According to experiment of a insulation performance, coefficient of overall heat transmission of the cement block wall and clayed hollow block wall was calculated respectively $2.72W/^2K$ and $1.42W/^2K$. (2) The annular load saving of the clayed hollow block wall was evaluated 1.5% larger than its of the cement block wall. (3) The construction cost of the clayed hollow block wall was calculated 73% more expensive than its of the cement block wall. (4) The construction cost of the clayed hollow block composite wall was calculated 13.7% more expensive than its of the cement block composite wall.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.22 no.10
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• pp.2136-2149
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• 1997

This paper describes RISC core that has been designed for embedded and protable applications such as PDA or PCS. This RISC processor offers low power consumption and fast context switching. Processor performance is improved by using conditional instruction execution, block data transfer instruction, and multiplication instruction. This architecture is based on RISC principles. The processor adopts 3-stage instruction execution pipeline and has achieved single cycle execution using a 2-phase 40MHz clock. This results in a high instruction throughput and real-time interrupt response. This chip is implemented with $0.6{\mu}m$ triple metal CMOS technology and consists of about 88K transistors. The estimated power dissipation is 179mW.

• Wind and Structures
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• v.31 no.4
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• pp.363-371
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• 2020

Proper understanding of offshore wind speed variability is of essential importance in practice, which provides useful information to a wide range of coastal and marine activities. In this paper, long-term wind speed data recorded at various offshore stations are analyzed in the framework of fractal dimension analysis. Fractal analysis is a well-established data analysis tool, which is particularly suitable to determine the complexity in time series from a quantitative point of view. The fractal dimension is estimated using the conventional box-counting method. The results suggest that the wind speed data are generally fractals, which are likely to exhibit a persistent nature. The mean fractal dimension varies from 1.31 at an offshore weather station to 1.43 at an urban station, which is mainly associated with surface roughness condition. Monthly variability of fractal dimension at offshore stations is well-defined, which often possess larger values during hotter months and lower values during winter. This is partly attributed to the effect of thermal instability. In addition, with an increase in measurement interval, the mean and minimum fractal dimension decrease, whereas the maximum and coefficient of variation increase in parallel.

• The KIPS Transactions:PartC
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• v.9C no.4
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• pp.573-580
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• 2002

Within the security architecture of the 3GPP system there is a standardised integrity algorithm f9. The integrity algorithm f9 computes a MAC to authenticate the data integrity and data origin of signalling data over a radio access link of W-CDMA IMT-2000. f9 is a variant of the standard CBC MAC based on the block cipher KASUMI. In this paper we provide the provable security of f9 We prove that f9 is secure by giving concrete bound on an adversary's inability to forge in terms of her inability to distinguish the underlying block cipher from a pseudorandom permutation.

• Information and Communications Magazine
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• v.21 no.3
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• pp.13-40
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• 2004

홈 네트워킹은 다양한 유ㆍ무선 네트워킹 기술을 적용하여 개개인의 생활을 더 윤택하게 해 주는 서비스를 제공하고 이를 통해 커다란 시장을 형성할 수 있는 미래의 신 성장 동력 산업이다. 이를 위해 PLC, IEEE 1394, HomePNA와 같은 유선 홈 네트워킹 기술은 물론 WLAN, WPAN, UWB 등과 같은 무선 네트워킹 기술이 여러 가지의 응용 분야를 무기로 자신의 영역을 차지하려 하고 있다. 따라서 댁내의 기기는 이와 같은 네트워킹 기술을 지원하도록 설계되어야 하지만, 그 위에 UPnP나 HAVi, Jini, HNCP 등과 같은 미들웨어가 탑재되어야 상호 호환성이 지원된다. 그리고 하나의 표준화된 H/W나 S/W 플랫폼 위에 혼 게이트웨이가 동작하면 집 외부에서 원격으로 새로운 서비스를 지원할 수 있게 되며 응용 분야가 다양하게 확장될 수 있다. 그 위에 유비퀴터스 네트워킹 개념을 도입하여 홈 네트워크가 필요로 하는 서비스를 지원함으로써 커다란 시장을 이끌어 갈 수 있게 된다. 본 논문에서는 홈 네트워킹 기술의 표준화 현황에 대해 정리하고, 차세대 성장 동력으로서의 홈 네트워킹을 위해 반드시 적용해야 할 유비퀴터스 네트워킹 개념과 이로부터 효과를 얻기 위해 집안에 홈 네트워크를 어떻게 수용하게 할 것인지에 대해 논하였다. 끝으로 유비퀴터스 네트리킹을 통한 막대한 시장을 먼저 확보하기 위한 무선 홈 네트워킹 기술의 아키텍처를 정하면서 이를 구현하기 위해 먼저 수행해야 할 Mesh Networking 기술 및 Multi-Hop 네트워킹 기술과 같은 연구분야에 대해 논하였다.(중략)

• JSTS:Journal of Semiconductor Technology and Science
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• v.11 no.4
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• pp.238-246
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• 2011

A 3-5 GHz UWB radar chip in 0.13 ${\mu}m$ CMOS process is presented in this paper. The UWB radar transceiver for surveillance and biometric applications adopts the equivalent time sampling architecture and 4-channel time interleaved samplers to relax the impractical sampling frequency and enhance the overall scanning time. The RF front end (RFFE) includes the wideband LNA and 4-way RF power splitter, and the analog signal processing part consists of the high speed track & hold (T&H) / sample & hold (S&H) and integrator. The interleaved timing clocks are generated using a delay locked loop. The UWB transmitter employs the digitally synthesized topology. The measured NF of RFFE is 9.5 dB in 3-5 GHz. And DLL timing resolution is 50 ps. The measured spectrum of UWB transmitter shows the center frequency within 3-5 GHz satisfying the FCC spectrum mask. The power consumption of receiver and transmitter are 106.5 mW and 57 mW at 1.5 V supply, respectively.

• Proceedings of the Korea Information Processing Society Conference
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• 2009.11a
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• pp.849-850
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• 2009

하드웨어와 소프트웨어의 통합설계를 이용한 시스템 개발에서는 하드웨어와 소프트웨어 요소가 가지는 비용, 개발 시간, 유연성, 재사용성, 수행성능과 같은 특징간 trade-off를 고려해야 한다. 개발조직에서는 통합설계 및 개발을 위한 릴리스 플랜 수립 시에 개념적 수준의 하드웨어/소프트웨어 분할 아키텍처 스타일 후보들을 도출하고, 요구사항 선택을 위해 도출된 후보들에 대한 상대적 중요도를 결정한다. 본 논문에서는 제품의 릴리스 플랜 수립을 목표로 우선순위에 기반한 아키텍처 스타일 우선순위 선정 프로세스를 제안한다. 이를 위해 하드웨어와 소프트웨어 요소 사이의 trade-off를 고려하여 우선순위를 결정한다. 개발조직의 이해당사자는 주어진 자원 및 제약사항 내에서 제품의 목표를 달성할 수 있도록 우선순위화를 통해 릴리스 플랜의 완성도를 높일 수 있다.

• Fire Science and Engineering
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• v.33 no.1
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• pp.130-137
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• 2019

In this study, the acoustic characteristics of 13 types of emergency broadcasting speakers were tested under the test set-up of UL 2043 and compared. When the sound pressure level of 1 W speakers was compared with speakers with a 15 W output, the SPL of the 15 W speakers was approximately 20 dB higher in some frequency bands. Loudness analysis showed that people can recognize emergency sound from a 15 W speaker twice as loud as the emergency sound from 1 W speakers. The analysis results on the articulation index (room) had an opposite tendency with loudness results, meaning that small speakers can generate clearer sound. Therefore, it is necessary to improve emergency broadcasting speakers to generate louder and clearer sound. Moreover, a performance evaluation standard is needed based on the reasonable and quantitative measurements and evaluations of the acoustic characteristics of the emergency-broadcasting speakers so that a sufficient and clear sound can be generated in various spaces. In addition, it is necessary to establish standards for the clarity of emergency broadcasting in various spaces.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.11 s.353
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• pp.48-57
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• 2006

This work describes a 12b 200KHz 0.52mA $0.47mm^2$ algorithmic ADC for sensor applications such as motor controls, 3-phase power controls, and CMOS image sensors simultaneously requiring ultra-low power and small size. The proposed ADC is based on the conventional algorithmic architecture with recycling techniques to optimize sampling rate, resolution, chip area, and power consumption. The input SHA with eight input channels for high integration employs a folded-cascode architecture to achieve a required DC gain and a sufficient phase margin. A signal insensitive 3-D fully symmetrical layout with critical signal lines shielded reduces the capacitor and device mismatch of the MDAC. The improved switched bias power-reduction techniques reduce the power consumption of analog amplifiers. Current and voltage references are integrated on the chip with optional off-chip voltage references for low glitch noise. The employed down-sampling clock signal selects the sampling rate of 200KS/s or 10KS/s with a reduced power depending on applications. The prototype ADC in a 0.18um n-well 1P6M CMOS technology demonstrates the measured DNL and INL within 0.76LSB and 2.47LSB. The ADC shows a maximum SNDR and SFDR of 55dB and 70dB at all sampling frequencies up to 200KS/s, respectively. The active die area is $0.47mm^2$ and the chip consumes 0.94mW at 200KS/s and 0.63mW at 10KS/s at a 1.8V supply.

• Fashion & Textile Research Journal
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• v.17 no.3
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• pp.351-363
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• 2015

This research explores diachronic fashion design trends through a structure analysis of a connection network based on fashion show concepts implemented by modern fashion designers from S/S 2009 to F/W 2013. The findings from this research are as follows. First, four categories affect the inspiration and thinking of design: the experience of the designer, social atmosphere and phenomena, natural sensitivity (or formative characteristics of natural objects), and the influence and quality of other fields. Second, in cases where the designers' experiences influenced design inspiration and thinking, designers express personal memories with keywords like high school, grandmother's closet, prom, beauty and the beast, heritage, past, and reminiscence through design elements such as lines, silhouettes, materials, and colors. Third, the representative example of the social atmosphere and phenomena that influenced design inspiration and thinking was the 2008 Global Financial Crisis that reflected the social climate through design concepts of keywords such as Recession, Black, Economy, US, Depression, Gray, Dark Age, White and New York. Fourth, inspired by nature and the formative characteristics in design, the designers employed ornamental elements to collections and design concepts that focused on nature words connected to light, sun, wild, dirt, rock, moss, and trees. Fifth, the designers took their ideas from different fields of personal interest in the arts, science and humanities (sports, architecture, sculpture, painting, and literature) that were decisive in determining materials, design colors and silhouettes. The theme of architecture was analyzed as a central element that had an ongoing impact on the concepts of designers.